Re: [SI-LIST] : Plane Capacitance

About this list Date view Thread view Subject view Author view

From: Mike Hughes (mike.hughes@analog.com)
Date: Thu Nov 11 1999 - 10:33:40 PST


Thanks for all the replies so far, they have been helpful.

To clarify a little: cost is always an issue, but for my application
(mixed-signal IC testing), board costs are a small fraction of the total project
cost. Also the intent of my question is to learn more about the theory, and then
apply what I can.

In my application I do not use signal layers between the planes. I typically use
5 mil spacing between power and ground.

Signal
50ohm Z
GND
5mil
PWR
Fill for required thickness
PWR
5mil
GND
50ohm Z
Signal

I've been wondering if I can use 4 mils or 3 mils to raise the plane
capacitance. I was planning on staying with FR4. As far as 2, 3 or 4 mils being
manufacturable is something that I didn't intend to discuss here, but I
appreciate any replies none the less. My main intention is to find out if
raising capacitance in this way can hurt decoupling. A second intention is to
learn more about determining decoupling requirements (effective area of
capacitance, etc).

Mike

-- 
================================
Mike Hughes               
Product/Test Engineer      
High Speed Conversion       
Analog Devices, Inc. 

Phone 781-937-2370 Fax 781-937-1011 mailto:mike.hughes@analog.com http://www.analog.com ================================

**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue Feb 29 2000 - 11:39:45 PST