From: Ron Miller (rmiller@Brocade.COM)
Date: Mon Nov 08 1999 - 14:07:49 PST
Larry & Mike
There is another way of looking at this which is more appropriate to
microwave circuit analysis.
At higher frequencys where the length of these lines is an appreciable
part of a quarter wavelength the traces and internal inductance of these
connections must be analyzed as transmission lines. Paralleling parts
does not reduce the inductance but simply reduces the impedance.
At lower frequencys the inductances in parallel do add according to
So, at what frequency do we analyze them as transmission lines?
Whenever the parasitic inductance or capacitance becomes a problem
you are already in the realm where transmission lines are the right tool
> Regarding your comment...
> <<But in many cases, you could have just put the multiple vias in parallel
> (not in a checkerboard pattern) and mounted a dumb old 0805 capacitor
> on them. There would be almost as much improvement in the inductance
> and you can skip the expensive part. That is because the inductance
> is in the design of the vias, mounting pads and distance to the power
> planes, with only a minor amount attributed to the capacitor.
> One thing you may have overlooked in your commentary about multiple-via pads
> for capacitor mounting is the mutual coupling effect between adjacent +/-
> vias that will reduce inductance much more than paralleling like vias (i.e.,
> all + or all -) in close proximity. The interdigitization (is there such a
> word?) is the basic principal behind the AVX capacitor construction.
> Granted, the amount of via inductance reduction may not exceed 50% (which
> only translates to ~40% increase in SRF), but that may be what's needed for a
> leading edge product. Unfortunately, the price tag makes one carefully weigh
> the performance/cost tradeoff.
> Michael L. Conn
> Owner/Principal Consultant
> Mikon Consulting
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