# RE: [SI-LIST] : Comment on Johnson's article

From: Grasso, Charles (Chaz) ([email protected])
Date: Mon Nov 08 1999 - 10:33:21 PST

I would like to thank Larry & Dr. J for their willingness
to discuss these technical issues in a public forum.

Thank you gentlemen - I learn a lot from these.

-----Original Message-----
From: Larry Smith [mailto:[email protected]]
Sent: Friday, November 05, 1999 5:45 PM
To: [email protected]
Subject: Re: [SI-LIST] : Comment on Johnson's article

I'll have to join the ranks of those who have made public
miscalculations on SI-list. Embarrassing..

In the following paragraph in a note 2 days ago, I calculated the
impedance of a 1 nH inductor at 100MHz (628 mOhms), but did not put 100
of them in parallel to get 6.28 mOhms. This impedance is clearly under
the 10 mOhm target impedance, but it is all inductive.

> We are using about 100 decoupling capacitors now. One hundred times 1
> nH in parallel gives an impedance of 628 mOhms at 100 MHz (jwL =
> 2*pi*1E8*1E-9), far more than we can tolerate. To achieve a target
> impedance of 10 mOhms, we would need 6280 inductances in parallel! And
> the impedance would be purely inductive, which would resonate badly
> with the pure capacitance of the power planes. By using carefully
> chosen capacitors and careful PCB layout, it is possible to achieve a
> resistive 10 mOhm impedance with about 100 capacitors to well over 100
> MHz.

To redeem myself, I have done the following simulation to show how
dangerous inductive capacitors can be when attached to power planes
that are almost purely capacitive. The power planes are 2 pairs of 11
inch square planes spaced 2 mils apart to minimize power plane
impedance, like we might use on a system PCB.

In one case, 96 x 0.1 uF Y5V capacitors with 100 mOHms ESR are mounted
on the power planes with 1 nH of loop inductance. The parallel LC
circuit has a high impedance resonance at 150 MHz as shown in the top
panel of the attached .gif file.

In the second case, 96 X7R and NPO capacitors with carefully chosen
values were simulated with the same mounting inductance and power plane
capacitance. The quantities and values were chosen so that the power
distribution system impedance would remain near a target impedance
across a broad frequency range. A Resistive impedance is presented to
the power planes up to nearly 300 MHz, eliminating the resonance with
the power planes as shown in the top panel of the .gif file.

Suppose we are building a system with a 2 volt power supply and a bus
frequency of 150 MHz. If the system has 250 active drivers into 50 Ohm
transmission lines, we can expect up to 10 amps of transient current.
If the power supply is to remain within 5% tolerance, the target
impedance is 2V x 5% / 10amps = 10 mOhms.

The second panel in the .gif file shows what happens to the power
distribution voltage when 10 amp transients are drawn at 150 MHz. The
system with carefully chosen low ESR capacitors remains within +- 5%
for this and all other 10 amp stimulation. The system with 96 Y5V
capacitors has a resonance that gets stimulated badly at 150 MHz.
After several clock cycles, the power distribution voltage has 20%
excursions.

I have seen waveforms like this in the lab on machines that were not
crashing. I guess the ones that crashed were worse than this. The
situation can be fixed with carefully chosen low ESR capacitors and
careful placement on the power planes. Welcome to high speed design. ;^)

regards,
Larry Smith
Sun Microsystems

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