From: phelan, tony (firstname.lastname@example.org)
Date: Mon Nov 08 1999 - 06:12:52 PST
In trying to forward the idea of Burried Capacitance in my area but a PCB
Engineer insists that one cannot route vias through the burried capacitance
layer as the "via keep-outs" change the capacitance in that area? Is this
From: Jon Keeble [mailto:email@example.com]
Sent: Monday, November 08, 1999 3:50 AM
Subject: Re: [SI-LIST] : Micro Noise
This story is about two parallel boards, one with 24 bit A2D and D2A
converters (and associated op amps, differential line receivers /
transmitters), the other with a DSP and other digital bits.
The problem showed up in rev4 of previously working boards.
To cut a long story short, proximity (it had to be very close) ruined the
noise figures (increased the noise floor). Production found that interposing
a floating metal shield fixed the problem, not a solution that would have
occurred to me.
Engineering took a look, and found a wire link placed in a couple of through
holes that hadn't been trimmed - the wire got to close, to pin1 of a 20 pin
GAL - the clock pin on the circuitry below.
My explanation is that the floating metal shield creates a unipotential that
averages out the different potentials, effectively decreasing the peak E
field near the wire.
Could some similar mechanism be in play here?
From: Dennis Tomlinson < firstname.lastname@example.org <mailto:email@example.com> >
To: firstname.lastname@example.org <mailto:email@example.com> <
firstname.lastname@example.org <mailto:email@example.com> >
Date: Saturday, November 06, 1999 10:14 AM
Subject: Re: [SI-LIST] : Micro Noise
Chuck Hill wrote:
> I remember another fellow having this problem with an Intel 80186
> processor. He placed a piece of copper tape on the package--I don't
> remember whether he grounded it or not.
This is the second or third reference on this thread to a floating shield.
I have some concern over whether or not this would be at all effective.
Wouldn't an E-field be unaffected by such a shield? I can believe that an
H-field could be shielded in this manner, but to what avail? A piece of
copper tape stuck to the top of a plastic IC package is in the "very" near
field - dominated by the E and not the H. I suspect a biconical antenna
three meters away would show little or no measurable difference between
shielded and unshielded.
Just my $0.02
> Charles Hill, consultant
> At 10:31 AM 11/3/99 -0500, Lfresearch@aol.com <mailto:Lfresearch@aol.com>
> >Hi all,
> >I have a problem with a microprocessor which appears to be radiating very
> >strongly from the package. I've deactivated all other circuits ( pulled
> >crystals, pins etc ) on the board. Additionally, the micro is held in
> >PROM's are pulled, but it's a noisy as heck. Close field probes ( both E
> >H field ) show the package to be the dominent source of radiation.
> >The device has a maximum clock rate of 50 MHz, this is where we're using
> >Clock it at 32 MHz and the emissions fall about 10 dB up to about 300
> >more above 300 MHz. Yes it's a CMOS device.......
> >Am I stuck with putting a can over the chip? The product has a plastic
> >package, so there is no shielding available at all.....
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