Re: [SI-LIST] : Comment on Johnson's article

About this list Date view Thread view Subject view Author view

From: Howard Johnson ([email protected])
Date: Fri Nov 05 1999 - 16:39:47 PST

Uh, Larry I'd like double-check some of your numbers below.
Maybe you're right, but it looks to me like a factor-of-100
error may have been involved.

According to my calculation, the impedance of the series
inductive component in a single capacitor (with a 1-nH
assumed layout, with the power and ground planes close to
the surface of the board as you describe), would give you:

wL = 2*pi*1E8*1E-9 = 629 mOhms PER CAPACITOR

If I now put 100 of these in parallel, you would get an
overall impedance 1/100 times less, or 6.29 mOhms. That's
pretty low. It doesn't look to me like you need 6290 of

If you want to achieve an even lower impedance, try smaller capacitors,
or go with some of the more advanced packages (for
example the new "IDT" package from AVX claims to
deliver an installed inductance of 0.1 nH per component.)

Best regards,
Dr. Howard Johnson

At 08:53 AM 11/4/99 -0800, you wrote:
>Dr Johnson - Thank you for the comments. Please see my response in
>the text:
>> Date: Wed, 03 Nov 1999 15:26:36 -0800
>> From: Howard Johnson <[email protected]>
>> I think the original question that started this
>> thread has been adequately addressed, but there
>> is one thing I'd like to say about Larry's note below.
>> Although I USUALLY agree with him, I'll have to differ
>> this time.
>> My quibble has to do with the
>> precise value of capacitance in a bypass capacitor.
>> For ordinary, inexpensive dielectrics (like Z5U) in
>> small packages the value of capacitance (after
>> discounting for the initial tolerance, temperature,
>> and aging) can vary by a factor of 3:1. With
>> that large a swing in the value of capacitance
>> you can't really assume much about the precise
>> location of the series resonant frequency. If you
>> want to precisely control the SRF you need to use
>> a more stable dielectric (which therefore has
>> a lower dielectric constant, and comes in a LARGER
>> package). I don't think that's such a good tradeoff.
>> I'd rather see Larry just put enough capacitors
>> on the board to make it work purely from consideration
>> of the inductance alone, without have to make assumptions
>> about the precise location and depth of the SRF null.
>We are using about 100 decoupling capacitors now. One hundred times 1
>nH in parallel gives an impedance of 628 mOhms at 100 MHz (jwL =
>2*pi*1E8*1E-9), far more than we can tolerate. To achieve a target
>impedance of 10 mOhms, we would need 6280 inductances in parallel! And
>the impedance would be purely inductive, which would resonate badly
>with the pure capacitance of the power planes. By using carefully
>chosen capacitors and careful PCB layout, it is possible to achieve a
>resistive 10 mOhm impedance with about 100 capacitors to well over 100
>There are several different capacitor dielectric types, each with
>different characteristics. I don't like to use Z5U and Y5V capacitors
>for decoupling because they have such poor voltage and temperature
>coefficients, just as you have said. The tolerance is usually given
>as +20% and -80%. The -80% comes at high temperature. In other words,
>just when your system needs decoupling the most, during high power
>(high heat) conditions, the capacitor has only 20% of it's rated
>value. No thanks!
>X7R capacitors have much better temperature and voltage coefficients
>(about 10%). They are available between 4.7nF and 1uF in 0603 and 0805
>package sizes. X5R dielectric is has similar voltage and temperature
>coefficients but a little less reliability. Aggressive vendors can
>push X5R ceramic capacitors up to 100 uF in larger package sizes. They
>are cost competitive after derating the Z5U and Y5V capacitors. But
>the ESR of X7R capacitors becomes unacceptably high below 4.7nF.
>We use NPO capacitors for 3.3nF and all lower capacitor values.
>Voltage and temperature coefficients are 5% or better. The ESR is much
>lower than X7R because many plates in parallel are required to achieve
>nF values. We routinely target EMI problem frequencies and solve
>compliance problems by working with the capacitance and mounted
>inductance to achieve a low impedance resonance at the problem
>frequency. At resonance, it is possible to achieve an impedance that
>is 1/5 or maybe even 1/10 of the impedance of the inductance at that
>frequency, depending on the ESR of the capacitor. And, the impedance
>is resistive rather than inductive. With careful design, it does not
>cause anti-resonance problems with the 'pure' capacitance of the PCB
>power planes.
>The analysis given in the previous note involved 3.3, 2.2, 1.5 and 1.0
>nF NPO dielectric capacitors. Those are best for decoupling between
>100 and 200MHz. Our processors are capable of putting tremendous (20
>amp) transients on the power planes at those frequencies. The 5%
>tolerance in capacitance actually smoothes out the impedance curve --
>if you can count on the capacitance values having a nice statistical
>> Also, as a general rule, as you lower the series resistance
>> of a capacitor the notch at the SRF deepens, but
>> unfortunately at the same time the (parallel) resonance
>> between the (inductance of the) discrete capacitor package
>> and the (idealized) capacitance of the Vcc-Gnd planes
>> becomes more pronounced. For this reason I don't usually
>> seek capacitors with a super-low value of ESR. I stick
>> with the cheap, cruddy, non-resonant kind of regular
>> bypass capacitors (Z5U or equivalent) that don't harbor
>> any resonant surprises.
>Yes! As you lower the series resistance, the dips (series RLC)
>resonances get deeper and the peaks (parallel RLC) anti-resonances get
>higher. Kind of like playing with fire... But by using many different
>values of capacitors on low inductance pads and careful placement on
>the power planes, we achieve a flat (resistive) impedance across a
>broad frequency range, as demonstrated in the previous analysis.
>If you can tolerate a power supply impedance of several hundred mOhms
>in the 30 to 300 MHz region, cheap, cruddy, resistive Z5U capacitors
>will do fine. But modern busses run at 66 and 133MHz and we are
>running some faster than that. I have seen computers consistently
>crash when running customer code because the code stimulates
>the power planes in the 100 MHz region. With careful decoupling
>capacitor design, it is possible maintain a power distribution
>impedance less than 10 mOhms to several hundred MHz, and beyond that
>with careful power plane design. Low power distribution impedance at
>high frequency is also very effective in solving EMI problems.
>best regards,
>Larry Smith
>Sun Microsystems
>**** To unsubscribe from si-list: send e-mail to
>[email protected] In the BODY of message put: UNSUBSCRIBE
>si-list, for more help, put HELP. si-list archives are accessible at
> ****
Dr. Howard Johnson, Signal Consulting, Inc.
tel 425.556.0800 fax 425.881.6149 email [email protected]

Upcoming High-Speed Digital Design seminars:
S E E - - - >>>

**** To unsubscribe from si-list: send e-mail to [email protected] In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at ****

About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue Feb 29 2000 - 11:39:40 PST