Re: [SI-LIST] : Micro Noise Part 2

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From: Douglas McKean (dmckean@corp.auspex.com)
Date: Fri Nov 05 1999 - 11:09:39 PST


At 12:47 PM 11/5/99 EST, Lfresearch@aol.com wrote:
>
>I've not seen this lay-up suggested much, but it looks like it could work.
So
>before I go ahead and try it I thought I'd bounce the idea.....
>
>Opinions?
>
>Thanks,
>
>Derek.

Wild suggestion, but have you considered
GND/S1/S2/<fill>/PWR? Since it appears
to be lo-freq stuff and the fact you haven't
mentioned controlled impedence makes me
think of this stackup. Traces could then
be routed easily between S1 and S2 easily.
I've never liked working with 4 layer
boards but when you're stuck, you're stuck.

The transient testing can cause all sorts
of crazy things to occur. Proximity to the
transient without lack of good sheilding
effectiveness is one killer. At least you
could get some SE that. Doug

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