From: Eric Goodill (firstname.lastname@example.org)
Date: Fri Nov 05 1999 - 10:30:58 PST
Jason Zheng wrote:
> > Be careful if you intend to use an inverter as a clock buffer. The alvc
> > stuff is pretty fast, but not nearly fast enough for your needs. That
> > particular part is about 4nS spec into a heavy load, and a minimum Tpd spec
> > of 1nS. At 240MHz Tpd alone is 50% of your cycle interval. That
> > translates to linear amplifier. I don't know who did your ASIC's or the
> > system design, but 240MHz at SSTTL is going to be very hard to do.
> Thank you for your help!
> Our ASIC is committed already. We are designing the prototype
> board to bring it up. For now, it only needs to work at
> room temperature (instead of the worst case conditions). If
> the IDT74ALVC16244A part (or GAL16LV8) is not fast enough for
> room temperature application, do you know of any other part that
> might do? We will have adjustable delay lines to tune the skew
> among ASICs, so the skew is not the prob. But it needs
> to drive 100 or 50 ohm transmission lines for TTL/CMOS levels.
Do *not* use the GAL16LV8D (3 ns tpd). I've tried this as a 44 MHz clock
driver on a 50-ohm line, and it doesn't work. It's a very weak driver.
Looking at the incident wave step, it looks like about a 90-ohm output.
Lattice's (at the time) IBIS model shows a stronger driver that can drive a
50-ohm line just fine in simulation.
Eric Goodill Cisco Systems M/S SJ-N2 mailto:email@example.com 170 W Tasman Dr voice: (408) 527-3460 San Jose CA 95134-1706 fax: (408) 527-3460 (yes, the same)
**** To unsubscribe from si-list: send e-mail to firstname.lastname@example.org. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****
This archive was generated by hypermail 2b29 : Tue Feb 29 2000 - 11:39:38 PST