[SI-LIST] : LVDS SSO Analysis Question

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From: David Haedge (d-haedge@raytheon.com)
Date: Wed Nov 03 1999 - 10:46:07 PST


Fellow SIers,

I am working on an SSO analysis that involves large numbers of LVDS outputs
switching on a die. One of the reasons to use LVDS is because the driver is
basically just redirecting a 4mA current in the output loop, hopefully
eliminating large di/dt's on power and ground. However, my SPICE analysis
shows a 20-25mA current spike on VDD and VSS with a rise/fall time of about
230ps each time the device switches (375MHz rate). It was assumed that we
could get by with a lot less VDD and VSS pads due to the expected low di/dt's.
It appears now that with this large unexpected current spike, we need to triple
the number of powers and grounds to achieve an acceptable voltage drop/ground
bounce. Has anybody out there seen this sort of behavior in LVDS circuitry?
Or is this just perhaps a quirk in SPICE (or my chosen vendor)?

Anxiously awaiting replies,

David Haedge
Raytheon

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