Re: [SI-LIST] : Comment on Johnson's article (Now BuriedCapacitance)

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From: Dr. Edward P. Sayre (esayre@nesa.com)
Date: Tue Nov 02 1999 - 14:08:36 PST


I can "resonate" with Mike Conn about the positive effects of buried
capacitance layers.

In the past, I didn't want to believe that they were as beneficial as they
appear, having written about and investigated various types of bypass
capacitor configurations through careful SPICE simulations and otherwise.
The fact of the matter is the BC layers do a better job of delivering sharp
risetime currents to the chip power pins all other things being equal...

However, remember that the return planes for the signal transmission lines
must be have either well bypassed or low inductance connections to the BC
layers as well so that the signal currents returns over direct and low
parasitic (low series incremental inductance) paths back to the chip ground
and power pins (in the case of CMOS driven x-mission lines with minimum of
negative SI effects.

Sincerely,

ed sayre

At 05:18 PM 11/1/99 EST, you wrote:
>John: (RE: Self-resonance)
>
>The buried capacitance (BC) configuration behaves as a (very) low impedance
>transmission line; hence, the phenomenon to consider/analyze is (as you
>suspected) the propagation delay of perturbations between the planes. Note
>that the magnitude of a disturbance caused by a sudden chip current demand
>reduces rapidly with distance from the demand point as the required charge
is
>drawn from a capacitor whose area is increasing at the square of the radius
>which is increasing at the propagation speed through the dielectric. Even
>though the board will still have an electrical resonance related to the
board
>dimensions, the voltage perturbation reaching a given board edge is small
and
>the radiation resistance of the closely spaced planes is beneficially
>mismatched to that of free space (120xPI, or 377 ohms); hence reduced energy
>will be radiated relative to other board constructions. The energy is
>reflected back from the plane edges and continues to dissipate in the
>material.
>
>In early 1993, boards using BC were tested over frequency by Zycon/Hadco
(and
>I repeated and confirmed the results in my lab). Other than the resonance
of
>external power supply leads with the large parallel-plate capacitor that the
>BC laminate creates, there were no high frequency resonances observable.
>There may be some more up-to-date tests that Hadco and/or other using
vendors
>have performed that may shed more light on this subject, but I have not seen
>this particular item addressed in any technical notes. (Responses anyone?)
>
>BC does do a remarkable job of filtering power supply ripple and containing
>frequencies from 40 MHz on up to the multiple GHz range. Since late 1992,
as
>a consultant and presenter, I have advocated the use of BC for high
frequency
>design in my own tutorials and recommended BC as a beneficial design tool in
>the 1993 HP High-Speed Digital Design Symposium (presented across the US and
>throughout Europe and parts of Asia). Today's high-speed systems can
benefit
>strongly from use of this design technique.
>
>Respectfully,
>
>Michael L. Conn
>Owner/Principal Consultant
>Mikon Consulting
>
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