[SI-LIST] : PECL output buffer implementation in CMOS

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From: Sandy Taylor ([email protected])
Date: Mon Nov 01 1999 - 17:06:40 PST

Jayarama Shenoy wrote:

> Hi All,
> Can someone provide insight into PECL output buffer
> implementation in CMOS tecnologies? It is being claimed
> that this cannot be done while at the same time retaining
> the power supply noise rejection of differential output
> drivers, which I find hard to understand.
> Any pointers to public literature on PECL (or similar diff-
> erential) output drivers in CMOS will be greatly appreciated.


PECL like drivers and receives can certainly be constructed in CMOS,
but it is a bit more complicated than a regular buffer.

Sun Microsystems published papers in the Hot Chips conference
about 3 years ago on the use high speed differential signals with
linearized slew rate control, impedance controlled (over PVT).
Sorry I do not have the exact reference, but it did not include the circuit details.

Here are (rather immodest) references you may want to look at:

Impedance control: http://patent.womplex.ibm.com/details?pn=US05955894__
Differential receiver: http://patent.womplex.ibm.com/details?pn=US05942918__
     " " http://patent.womplex.ibm.com/details?pn=US05942919__

The IBM patent engine is great, in includes the references as links.
For now you will have to read between the lines about the driver.

Sandy Taylor KJ6OU
CMOS Solutions
Olga Wa.

PS Don't let people saying it can't be done get in the way of just doing it.

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