From: Josip Popovic ([email protected])
Date: Mon Nov 01 1999 - 10:15:26 PST
Probably it would be vise to simulate a bypass network made from a few
parallel capacitors first before making any conclusions.
For example, it should not be forgotten that ESL of one cap creates an
LC
circuit with neighbor capacitance(s). There might be some energy
oscillating
between those two (EMI??). Or, with having more than one parallel cap
one
would have a parallel resonant circuit with a complex impedance with a
few
zeros or poles.
Josip
> -----Original Message-----
> From: Mark Randol [SMTP:[email protected]]
> Sent: November 1, 1999 10:51 AM
> To: [email protected]
> Subject: Re: [SI-LIST] : Comment on Johnson's article
>
> [email protected] wrote:
> > I think that you are not missing anything important - you conclude that
> > small total parasitic inductance of the bypass capacitors is most
> > important, which is what the article concludes. Dr. Johnson further
> says
> > that once you have decided to use many small valued capacitors of a
> > specific size (and thus a specific parasitic inductance), why not select
> > the largest value capacitor that you can get in that package size?
> (Taking
> > into account cost, reliability, etc.) You pay no penalty (or one could
> > argue a small penalty) in parasitic inductance, but the total
> capacitance
> > in the system is larger which is a benefit at the lower frequencies of
> the
> > wideband systems that we design.
> > Chris Simon
> > General Dynamics Information Systems
> >
> > Dear SI experts,
> >
> > I have a question on the article posted on Dr. Johnson's web site at
> >
> > http://www.sigcon.com/news/2_3.htm
> >
> > entitled `Bypass Capacitor Layout'. At the end of the article
> > Dr. Johnson's states that since the only parameter that affects the
> > performance of bypass capacitors at high frequency is their parasitic
> > inductance, there is no point in using many small capacitors, rather
> > the highest value capacitor in the chosen package should be used.
> > Isn't this in contraddiction with the principle, also stated in the
> > book, that many small capacitors are a better choice since the total
> > parasitic inductance is lower? After the series resonant frequency
> > of 1/sqrt(LC) the impedance goes up with 20 dB/decade slope so the
> > only way to decrease it is by lowering either L or C, so both L and C
> > are important.
> > Am I missing something?
> > Thanks in advance,
> > -Arrigo
>
> Isn't it a problem once the capacitors SRF is reached? Sure, that's the
> lowest impedance point, but beyond that the impedance begins to rise
> again. Past this first resonance everything I've seen shows that the
> component's impedance is somewhat unpredictable/unreliable.
>
> If the idea is the largest value capacitor that should be used has a SRF
> at or above the max frequency of interest, I have no problem there. "Of
> course", larger values with lower SRFs can be used too, as long as the
> higher frequencies are provided for with smaller capacitors or other
> circuits/structures.
>
> --
> Mark Randol, RF Measurements Engineer
> Motorola SPS, Inc.
> M/S EL381
> 2100 E. Elliot Road
> Tempe, AZ 85284
> (480)413-8052 Voice
> (480)413-3455 FAX
> [email protected]
>
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