AW: [SI-LIST] : Effect of low Zo for unterminated lines

About this list Date view Thread view Subject view Author view

From: Raymond.Leung@qsa.idt.com
Date: Mon Oct 25 1999 - 15:44:47 PDT


Andreas,

I think I have to clarify my point: I am not favoring to use lump
load model for real board design. This rule of thumb is used to
calculate the max. allowable current running through the pin.
Then if the load is a transmission line case, you can use the
figure from the above method to constrain your average current in
order to retain the chip reliability standard. Of course this
suggestion is usually good for chips specified with a capacitive
load; e.g. LVC245 as stated in the original posting.

Raymond

---------------------- Forwarded by Raymond Leung/QSA/AU on 26/10/99 08:33
---------------------------

"Andreas Lenkisch (Trenew)" <a.lenkisch@trenew.de> on 26/10/99 22:55:44

Please respond to si-list@silab.eng.sun.com

To: "'si-list@silab.eng.sun.com'" <si-list@silab.eng.sun.com>
cc: (bcc: Raymond Leung/QSA/AU)

Subject: AW: [SI-LIST] : Effect of low Zo for unterminated lines

Raymond,

it seems that we think very close to each other, but it was expressed by
different words. You favorite the current into the line capacitance (including
loads) for an estimation, I believe that the current into the line impedance,
assumed as a ohmic load may used for an estimation. But on my simulations, I
look at first for the waveforms and when I'm happy, I make a cross check for the
current absorbed from the clamps to be absolutely sure not to overstress a
component and reduce the live span.
Thank you for your discussion.

regards
Andreas

----------
Von: Raymond.Leung@qsa.idt.com[SMTP:Raymond.Leung@qsa.idt.com]
Gesendet: Montag, 25. Oktober 1999 01:13
An: si-list@silab.eng.sun.com
Betreff: AW: [SI-LIST] : Effect of low Zo for unterminated lines

Andreas,

It is very true that a responsible chip designer should handle the
reliability issue very conservatively in order to keep your product
robust. Besides, electromigration is a life span problem. The
conservative figure of the running current is trying to assure the
mean time of failure which for a ordinalry chip should be higher
than 10 years. The other thing is if the ambient temperature is alway
kept much lower than the max. limit, say, 70C, the life time is much
longer.

Regards,
Raymond

**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue Feb 29 2000 - 11:39:19 PST