Re: [SI-LIST] : Clean sheet of paper

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From: Bruce Rosenquist (brosen@designpro.org)
Date: Wed Dec 22 1999 - 06:11:50 PST


I was skimming the latest SI news, and your final comment caught my interest.
I am new to high-speed issues and controlling board impedances, and working
on a design which contains a lot of parallel termination for LVPECL signals.
This requires a termination voltage, which must, as you say, both sink and source current.

How do the pros typically do this? Are there any DC-DC converters that are made
specifically for this function? What are some of the nasties you speak of ?
What are the tricks ?

Bruce Rosenquist, Designer
DesignPRO Inc.
35 Stafford Rd., Unit 1
Nepean, Ontario
K2H 8V8 CANADA

http://www.designpro.org

brosen@designpro.org

phone: (613) 596-5030 fax: (613) 596-5163

D. C. Sessions wrote:

> With the year wrapping up and my inbox filling with
> "Out of Office Autoresponse" messages, I thought I'd
> kick off something more interesting than the joys of LVDS.
>
> In particular, what would we use for signaling if we could
> start with a totally clean sheet of paper? Rather than
> immediately jump to a solution, I'm looking for some criteria:
>
> * It has to be scalable. Given silicon technology trends, it
> should migrate gracefully to lower-voltages and less
> voltage-stress-tolerant semiconductors.
>
> * It has to be SI clean. Output impedance should be matched
> (stringency variable) to the line across the switching range.
> Inputs switchpoints should be symmetrical and well-defined
> (ie differential receivers). Power plane proliferation
> leads to bad SI and wasted money, so separate termination
> supplies are a Bad Thing.
>
> * It has to be versatile. Single-ended, balanced single-ended, or
> differential; multidrop or point-to-point; uni- or bidirectional;
> all should be minor variations on the same system.
>
> * It should be economical. Wasted power is a Bad Thing, so low
> swing is a must. Padrings are some of the most expensive real
> estate around, so pincount should be minimized. Line termination
> can dominate a PWB so KISS is the rule. Power supplies (esp.
> ones that can both sink and source current) are expensive and
> nasty to deal with, so do without (both for termination and
> funny analog functions in the I/O circuits.)
>
> What can we add to the list? Remove? Priorities? (This is
> engineering, we make tradeoffs.) Where does this take us?
>
> --
> D. C. Sessions
> dc.sessions@vlsi.com
>
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