Re: [SI-LIST] : Physcially-small far-end LVDS terminations?

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From: sweir ([email protected])
Date: Wed Dec 15 1999 - 16:07:59 PST


Eric,

Even though you have separate DC-DC supplies, I trust that you have done
homework to make sure that the receiver common mode is not exceeded.. If
so, then I agree that you are better off with the 100 ohm resistor. If
not, then trouble is afoot that I doubt the "T" network can fix.

Regards,

Steve.
At 05:06 PM 12/15/99 -0800, you wrote:
>"D. C. Sessions" wrote:
> >
> > Eric Goodill wrote:
> > > I want to use the typical LVDS termination where you have two 50-ohm
> resistors in series placed between the two lines of the LVDS diff. pair
> and also have a cap at the junction of the resistors to ground. I have a
> jillion LVDS pairs to terminate at a high-pin-count ASIC, and I'm looking
> to squeeze more terminations per square inch. (There's no hope of
> putting the terminations inside the ASIC at this point.) I'm hoping some
> company makes a single three-pin part the has those two resistors and a
> cap even if not specifically for termination use.
> > >
> > > How about any other ideas for even higher density?
> >
> > Well, a newline every 60-70 mcolumns would help :-)
>
>Sorry, set wrap to 72 chars.
>
> > Seriously, you should be able to skip the cap and just use a 100-ohm
> resistor.
> > Especially if you're running both ends of the line on a common ground.
> > Alternately, use a pullup pack (several 50-ohm resistors to a common pin)
> > and one cap. The application you're describing sounds like all of the
> pairs
> > come over a common path, so they should have pretty well-matched
> common-mode
> > potentials.
>
>Thanks for all replies. I just happened to pick D.C.'s message to
>actually reply to.
>
>I forgot to mention a few key pieces of info. Speed is about 200 MHz.
>Running card-to-card via backplane. Each card powered by separate DC/DC
>convertors. Point-to-point links.
>
>My concern is that I'll have some common-mode (single-ended) noise at
>the receiver. If there's no single-ended-termination path, then that
>noise may cause some timing jitter in the receiver. I'm a little
>worried about my timing margin right now, so I'd like to start with the
>idea os terminating the single-ended mode as well as the differential
>mode. I guess the main sources of single-ended noise I can think of are
>driver asymmetry and crosstalk. I've heard of mode conversion, but I'm
>not sure exactly how it would operate in my case.
>
>-Eric
>--
>Eric Goodill
>Siara Systems, [email protected]
>
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