Re: [SI-LIST] : IBIS models at Gbit speeds

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From: gedlund@us.ibm.com
Date: Thu Dec 09 1999 - 06:30:16 PST


gedlund@us.ibm.com wrote:
>
> Fabrizio and company,
>
> While I don't have any experience with model-to-hardware correlation at 1
> Gbit/s, I have done some work at slower speeds. I would be very leery of
> using a behavioral model at 1 Gbit/s. I was seeing 100-200 ps accuracy
> with the behavioral models I was using at slower speeds. (And I spent A
> LOT of time doing behavioral vs. SPICE vs. hardware correlation.) This
> could kill your design at 1 Gbit/s. I think you will find that "2nd and
> 3rd order" circuit behavior will suddenly become critical. The predrive
> stage and input waveforms will become significant as well as power and
> ground distribution.
>
> In fact, I would even be very critical of the SPICE models I am using at
> these speeds. In my opinion, any hardware running at this speed requires
> in-depth modeling and a well-designed component test bed to verify the
> accuracy of the modeling. Once the component is misbehaving in the
system
> it's awfully hard to determine the cause of failure. Of course, this
means
> you will have to limit the number of technologies you're running at this
> speed by the number of engineers who can characterize them!

Do you have a feel for how much of the discrepancy came from the active
device modeling and how much from interconnect? We *know* that IBIS is
inadequate for modeling parasitics, but it's not nearly so clear what
its limits are for active devices.

--
D. C. Sessions
dc.sessions@vlsi.com

D.C.,

In the case I was thinking of, most of the disrepancy came from the inability of the behavioral simulator to model non-ideal power and ground interconnects. However, as Dr. Unger pointed out at the DesingCon99 IBIS Summit, there is an active device component to this problem, too: while a behavioral simulator can handle Vds modulation due to rail collapse, it doesn't know what to do with Vgs modulation since there is no concept of a gate voltage in a behaviorl model. I was not able to distinguish between these two effects in my study.

I would have to believe there are a host of other active device effects that will come out of the woodwork at 1 Gbit/s. Each unique circuit design may even have its own 2nd and 3rd order effects, in addition to a bunch that are common among all circuits made from MOS (or bipolar) devices. A case study would be great, but no doubt we'd be treading in some proprietary territory...

Greg Edlund Advisory Engineer, Critical Net Analysis IBM 3650 Hwy. 52 N, Dept. HDC Rochester, MN 55901 gedlund@us.ibm.com

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