[SI-LIST] : bibliography for SI related books

About this list Date view Thread view Subject view Author view

From: Eric Bogatin (eric@bogent.com)
Date: Thu Dec 02 1999 - 05:32:48 PST


Frank, Mike and others-

For a listing of current and classic reference books on SI and EMI related
topics, please check the bibliography I posted on my web site:
http://www.bogatinenterprises.com/, then go to the resources section, under
bibliography. I added links to the ordering page at Computer Literacy for
each of the references. If any one has suggestions or recommendations for
good books I might have left off, please drop me a note and I'll check them
out.

(Thanks to D.C. for reminding me about Bill Blood's MECL Handbook, and to
many others for suggesting Dally and Poulton's book, Digital Systems
Engineering!)

--eric

Eric Bogatin
BOGATIN ENTERPRISES
Training for Signal Integrity and Interconnect Design
26235 W. 110th Terr.
Olathe, KS 66061
v: 913-393-1305
f: 913-393-1306
pager: 888-775-1138
e: eric@bogent.com
web: <http://www.bogatinenterprises.com/>

> -----Original Message-----
> From: owner-si-list@silab.eng.sun.com
> [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Mike Mayer
> Sent: Wednesday, December 01, 1999 3:52 PM
> To: si-list@silab.eng.sun.com
> Subject: Re: [SI-LIST] : si-list test
>
>
> >>>>> "Franck" == Franck Thierry <franckt@eicon.com> writes:
>
> > Gentlemen, I have a basic question regarding SI. We're beginning
> > to control the impedance on our boards (due to the increase of
> > the clock frequency), but I have the following question: How do
> > you define the impedance ? It's not clear for me today where
> > this value is coming from. PCB designer said the IC vendors
> > shoud give me this information, IC vendors say to use a SI
> > software and to work with PCB designer, but I have to say I'm
> > lost in this. Maybe one of you could help me on that ?
>
> The impedance of a trace on your board is a function of the physical
> geometries of the trace and the properties of the board
> materials. Primarily it is the width and height above a plane for
> microstrips and the width and plane separation for striplines. There
> are application notes around that talk about it. For instance:
>
> http://www.fairchildsemi.com/an/AN/AN-661.pdf
>
> If you are using TTL or CMOS devices with rise times on the order of
> 1nS or less (most modern parts) then you need all of the things people
> have told you -- the IC vendors give you models of their I/O buffers,
> and the SI software lets you simulate with the models. I would brush
> up on high speed design by looking into ssome of the more popular
> books on the subject. For instance:
>
> http://www.sigcon.com/books.htm
>
> If you can find the archives to this list there have been many threads
> on books.
>
> --
> ==================================================================
> ===========
> Mike Mayer Artesyn Communication
> Products, Inc
> Senior Hardware Design Engineer Madison, WI
> Mike.Mayer@cp.artesyn.com http://www.artesyn.com/cp
> ==================================================================
> ===========
>
>
> **** To unsubscribe from si-list: send e-mail to
> majordomo@silab.eng.sun.com. In the BODY of message put:
> UNSUBSCRIBE si-list, for more help, put HELP.
> si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list
> ****
>

**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Tue Feb 29 2000 - 11:39:04 PST