Re: [SI-LIST] : si-list test

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From: Mike Mayer (Mike.Mayer@cp.artesyn.com)
Date: Wed Dec 01 1999 - 13:51:36 PST


>>>>> "Franck" == Franck Thierry <franckt@eicon.com> writes:

> Gentlemen, I have a basic question regarding SI. We're beginning
> to control the impedance on our boards (due to the increase of
> the clock frequency), but I have the following question: How do
> you define the impedance ? It's not clear for me today where
> this value is coming from. PCB designer said the IC vendors
> shoud give me this information, IC vendors say to use a SI
> software and to work with PCB designer, but I have to say I'm
> lost in this. Maybe one of you could help me on that ?

The impedance of a trace on your board is a function of the physical
geometries of the trace and the properties of the board
materials. Primarily it is the width and height above a plane for
microstrips and the width and plane separation for striplines. There
are application notes around that talk about it. For instance:

http://www.fairchildsemi.com/an/AN/AN-661.pdf

If you are using TTL or CMOS devices with rise times on the order of
1nS or less (most modern parts) then you need all of the things people
have told you -- the IC vendors give you models of their I/O buffers,
and the SI software lets you simulate with the models. I would brush
up on high speed design by looking into ssome of the more popular
books on the subject. For instance:

http://www.sigcon.com/books.htm

If you can find the archives to this list there have been many threads
on books.

-- 
=============================================================================
Mike Mayer                               Artesyn Communication Products, Inc
Senior Hardware Design Engineer          Madison, WI
Mike.Mayer@cp.artesyn.com                http://www.artesyn.com/cp
=============================================================================

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