RE: [SI-LIST] : Transient impedance--IBIS models

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From: Chuck Hill (chuckh@altaeng.com)
Date: Wed Nov 17 1999 - 18:59:17 PST


Arpad,

You're right. I looked at your slides on the IBIS modeling presentation.
If one does the measurements right, and creates correct V-t tables, the
output impedance through the switching interval can be higher. The problem
I encountered was a poor method of creating an IBIS model.

On a related issue, how does one measure the effect of feedback within the
output? For example, a gate to drain capacitor. I guess this falls in the
"slew rate controlled" output arena. So how does IBIS account for these
effects and how could one measure an output driver with these
characteristics and create an IBIS model?

Charles Hill, consultant

At 02:47 PM 11/16/99 -0800, Muranyi, Arpad wrote:
>Chuck,
>
>I hate to disagree, but I have to. IBIS does not assume low impedance.
>Your tool may do that, but the IBIS specification does not.
>
>In my implementation of a behavioral HSPICE model which uses IBIS data
>I scale the IV curve with respect to time based on the ramp or Vt curve
>information. Now, the scaling factor at t0 is zero percent, i.e. zero
>current. As time goes by, the scaling factor grows to 100 %, i.e. full
>IV curve. Tell me if the zero current IV curve is not high impedance.
>
>Or did I misunderstand the whole topic here?
>
>Arpad Muranyi
>Intel Corporation
>=======================================================================
>
>
>-----Original Message-----
>From: Chuck Hill [mailto:chuckh@altaeng.com]
>Sent: Tuesday, November 16, 1999 2:03 PM
>To: si-list@silab.eng.sun.com; si-list@silab.eng.sun.com
>Subject: Re: [SI-LIST] : Transient impedance
>
>
>DC,
>
>That was the conclusion I reached as well. This was in conflict with the
>modeling approach used in IBIS. So I measured real devices to decide which
>view was correct. My conclusion is the assumption of low impedance during
>switching used by IBIS is a drawback, and not always true, in fact, mostly
>not true.
>
>Now, what are the implications? If the impedance is high during the
>switching interval, then the reflections off the source will have low
>attenuation (low return loss). Any waves incident to this driving source
>will be reflected. These could be reflected waves from loads on the bus,
>or near end crosstalk. The waves reflected off the source will appear at
>the loads as unwanted signals, (noise?) or intersymbol interference which
>causes timing jitter.
>
>Further, since IBIS assumes a low source impedance therefore a high return
>loss, its simulation results are better than reality in terms of this
>additional timing jitter mechanism.
>
>What do you think?
>
>
>Charles Hill, consultant
>
>P.S. IBIS is a very useful simulation environment for SI.
>
>
>
>At 03:46 PM 11/15/99 -0700, D. C. Sessions wrote:
>>Adrian Shiner wrote:
>>>
>>> If there are 2 active (cmos) devices in a push pull (totem pole) output
>>> stage then at some point both devices will be half way between on (low
>>> impedance) and off (very high impedance). The impedance must vary during
>the
>>> transition. Are you going to terminate both ends of the line which this
>>> device is driving so that the impedance variation is minimised? Does it
>>> matter? Perhaps we should return to current driven logic & stop worrying
>>> about the voltages???
>>
>>As a general rule, we design output stages to keep the crowbar current low.
>>Break-before-make, as it were, although it's no exactly sequenced so much
>>as just turning off faster than on. Necessarily, though, the output goes
>>through a high-impedance point.
>>
>>Compounding this is the fact that MOS devices aren't just modulated
>resistors.
>>If the gate-drain voltage is greater than about the threshold voltage, then
>>the output is resistive. Otherwise it's more or less a constant current,
>and
>>_that_ is certainly high impedance. As the driver turns on or off, you
>have
>>a situation where the gate-source voltage is decreasing while the
>drain-source
>>voltage is increasing -- the gate-source voltage drops REALLY fast, and the
>>transistor spends most of its transition time in high impedance.
>>
>>Therefore, the high-impedance window for a driver is quite a bit longer
>than
>>the nonoverlap interval. It's very nearly the entire edge time for a shunt
>>terminated line, since it starts shortly after the first device begins to
>>turn off and only ends when the second finishes turning on.
>>
>>> ----- Original Message -----
>>> From: Chuck Hill <chuckh@altaeng.com>
>>> To: <si-list@silab.eng.sun.com>; <si-list@silab.eng.sun.com>
>>> Sent: 15 November 1999 02:38
>>> Subject: RE: [SI-LIST] : What speed scope should I consider?
>>>
>>> > Arpad,
>>> >
>>> > I have a proprietary method of measuring the transient impedance. My
>>> > method is used to measure the output impedance of a buffer while
>switching
>>> > between high and low states. My measurements show that the output
>>> > impedance during buffer switching is often much higher than the on
>state
>>> > resistance.
>>> >
>>> >
>>> > Charles Hill, consultant
>>> >
>>> >
>>> >
>>> >
>>> > At 04:47 PM 11/12/99 -0800, Muranyi, Arpad wrote:
>>> > >I meant impedance vs. time, or non steady state but varying impedance,
>>> > >such as the impedance of a buffer turning on/off vs. time.
>>> > >
>>> > >Arpad
>>> >
>>>
>>==========================================================================
>>> > >
>>> > >-----Original Message-----
>>> > >From: Ron Miller [mailto:rmiller@Brocade.COM]
>>> > >Sent: Friday, November 12, 1999 3:54 PM
>>> > >To: si-list@silab.eng.sun.com
>>> > >Subject: Re: [SI-LIST] : What speed scope should I consider?
>>> > >
>>> > >
>>> > >Try Tektronix 11801 or a similar sampling scope from HP with the
>>> > >TDR option.
>>> > >
>>> > >Ron Miller
>>> > >
>>> > >
>>> > >"Muranyi, Arpad" wrote:
>>> > >
>>> > >
>>> > >Does anyone know of any instrument that can measure transient
>impedance?
>>> > >
>>> > >Arpad Muranyi
>>> > >Intel Corporation
>>> >
>>========================================================================
>>> > >
>>> > >
>>> > >Quote from previous correspondence:
>>> > >
>>> > >
>>> > >"Network analyzers measure steady state impedance, not transient
>>> impedance."
>>> > >
>>> > >
>>> > >
>>> > >**** To unsubscribe from si-list: send e-mail to
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>>> ****
>>> > >
>>> > >--
>>> > >
>>> > >Ronald B. Miller _\\|//_ Signal Integrity Engineer
>>> > >
>>> > >(408)487-8017 (' 0-0 ') fax(408)487-8017
>>> > >
>>> > > ==========0000-(_)0000===========
>>> > >
>>> > >Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA
>>> 95131
>>> > >
>>> > >rmiller@brocade.com, rbmiller@sjm.infi.net
>>> > >
>>> > >
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>>> >
>>> >
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>>>
>>> **** To unsubscribe from si-list: send e-mail to
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>>
>>--
>>D. C. Sessions
>>dc.sessions@vlsi.com
>>
>>**** To unsubscribe from si-list: send e-mail to
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>>
>
>
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