Re: [SI-LIST] : Transient impedance

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From: Sandy Taylor ([email protected])
Date: Wed Nov 17 1999 - 10:44:59 PST

sweir wrote:

> Thanks. I guess we will look forward to Feb. with great anticipation.


There are many options available to the cmos designer to help
linearize and "tame" cmos output circuits.

In fairness to Sai Vishwanthaiah (Sun Microsystems)
who wrote the paper to be published I should not disclose the details prior
to his presentation. But I will forward your email address to him and
see if he would send you an advance slide or two showing the schematics.
Once his paper is published I will ask to have it sent to the SI-list, or at
least a pointer to where it might be made available publicly.

From the ISSCC advance program:
15.1 Dynamic Termination Output Driver
for a 600MHz Microprocessor
                                                                                    1:30 PM
S. Vishwanthaiah, M. Ang, J. Starr 1, A. Taylor
Sun Microsystems, Inc., Palo Alto, CA
1Cisco Systems, Inc., San Jose, CA

Output driver circuits have output impedance control, linearization, and slew-rate control, for 1.5V operation in 0.18 Ám
CMOS. The signaling scheme uses dynamically-configured termination circuits.

The reason I responded to the original thread was to point out that
there are solutions out there, and you do not have to put up with
some of the nasty characteristics of generic CMOS IO circuits if the
performance requirements justify the use of more exotic circuits.

Sandy Taylor
CMOS Solutions

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