[SI-LIST] : SI Engineer Opportunity at Huawei--Shenzhen,China

Rachild Chen (rachel.chen@huawei.com.cn)
Tue, 19 Oct 1999 20:59:23 +0800

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Dear Sirs,

Huawei is a telecommunications company.If you are interesting our
company,you can know it by
internet address: http://www.huawei.com.cn .Now we need SI engineers.If
you like to work in
China and have the practices in SI,please contact with me and email your
resume.
The work place is in Shenzhen by the sea and have a good environment and
a modern city.

Duties:
Be a major contributor within a signal integrity design team.=A0 Work wit=
h
minimal technical
supervision to define/diagnose/solve complex signal integrity problems
(system clocking,
interconnect design, transmission line termination techniques, timing,
power/ground
distribution and decoupling, ASIC I/O cell selection, ASIC package and
pinout selection,
connector selection and pinout definition, parasitic minimization,
etc.). Provide technical
leadership to more junior members of the team.=A0 Lead projects as well a=
s
participate on
project teams as an individual contributor.
Conditions:
4~5years ( or more preferred) experience in the field of signal
integrity and analog issues related to high speed digital printed
circuit board design.=A0 Candidate should have hands on experience with
modeling and simulating with SPICE (HSPICE preferred) and
SpectraQuest(Cadence).=A0 Experience with electromagnetic field solvers
(such as Ansoft or Greenfield) and high speed board routers is also
desirable. Experience with static timing verifiers=A0 is desirable.
Also, experience with Cadence Allegro and/or CCT PCB layout routers is a
plus.=A0 Candidate should also be familiar with high speed board test pla=
n
generation and test measurement techniques (e.g., measurecrosstalk,
impedance, simultaneous switching effects, ...)=A0 Experience with
designing high speed digital buses (100MHz+) and knowledge of numerous
logic families (GTL+, LVDS, PECL, etc).=A0 Experience with designing cloc=
k
generation and distribution networks (including knowledge of techniques
to quantify and reduce clock skew and jitter) is also a major plus.
Knowledge of controlled impedance printed circuit board design and
fabrication.

We can provide a good work environment and a good treatment.

Regards,

Rachild
=A0

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