Re: [SI-LIST] : Intel apparenly has found the Rambus problem on the 820
D. C. Sessions (email@example.com)
Fri, 15 Oct 1999 07:36:48 -0700
Per Torstein R=F8ine wrote:
> This may be of some interest to you guys... I just read this on
> Also, this should be breaking news. Intel seems to have figured out
> WTF is up with the RAMBUS problems on their boards. The ROOT cause is
> as follows.
> Low launch voltage is due to superposition of:
> Back-2-Back Reads to Different Devices (device A & device B)
> Specific Data Patterns
> Position Sensitivity of EACH Device Being Accessed
> Low launch voltage exceeds the specification and derates RDRAM drive
> Launch Voltage is the voltage of a net when the output buffer begins
> Output buffer derating combined with architectural B-2-B handoff and
> reflections + crosstalk causes failure.
> All elements simultaneously required to cause failure.
> So it seems to be a quite complex problem involving inter-symbol
> interference, switching chips that write to the bus, reflections,
> crosstalk and so on.
> I wonder... What should they have done differently? Separate buses for
> writes and reads? Better connector/daugtherboard technology? One
> possibility would be to connect the daughterboards directly in series,
> instead of via the motherboard. Larger logic swing? Some kind of
> switch or ring topology instead of a bus? AFAIK, the original RamLink
> proposal used one-directional differential point to point connections
> in a ring, but the problem of course is latency.
That's pretty much the picture that I put together when the news broke,
but the more interesting question is what Intel plans to do to dodge the
problem. Such as redesign all existing motherboards and restrict future
designs to 2 RIMMS instead of three.
Well, that should make the thermal situation better too, but it's not
going to endear them to the server manufacturers, who were starting to
look like their only friends. Oops.
D. C. Sessions
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