Re: [SI-LIST] : Non-standard bus termination (2nd posting)

Ron Miller (rmiller@Brocade.COM)
Wed, 22 Sep 1999 14:48:02 -0700

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Hi DC

Make it a big cap.

The cap is used to keep from DC loading the line.

The resistor provides the line AC termination.

Ron Miller

"D. C. Sessions" wrote:

> Ron Miller wrote:
> >
> > Use tie all the common sides of the resistors together, and use one capacitor from the
> > common point to ground.
>
> Not exactly a Real Good Idea unless you have lots of timing margin.
> The problem is that this creates a lot of jitter (edge times depend
> on prior state of all the lines.)
>
> > Kassem Abdallah wrote:
> >
> > > > Has anybody out of there any suggestion about the following problem? (I think it
> > > > is quite a common one).
> > > >
> > > > I?ve got a board with a non-standard bus of 34 traces. The bus drives a group of
> > > > memories.
> > > > The lenght of the bus is necessarily higher than the critical lenght (lcr =
> > > > tr/2tpd): a termination could be useful. The problem: there are so many traces
> > > > that one has to use too many components (34 resistors and 34 capacitors for AC
> > > > parallel termination).
> > > >
> > > > What shall I do?
> > > > Are there any special components (array) to terminate this type of bus?
> > > > Shall I terminate the bus or not? (In past experience not always a termination
> > > > was mandatory)
> > >
> > > I am not the expert on SI Issues, but there are several resistor_packs
> > > for termination available from a variety of vendors. However, You have
> > > to be very carefull, because these packs sometimes cause noise and make
> > > things worst. It depends on how the resistors network is packaged for
> > > current/GND leads.( I suggest to look carfully at the schematics and do
> > > some noise analysis).
> > >
> > >
> > > Also, I "think" a 34-bit bus is not that WIDE, and if it is critical
> > > data path, you might be better off terminating with single loads( may
> > > be you can stick them on the backside of your board ?? It is a
> > > compromise).
> > >
> > > ********************
> > > |Kassem M. Abdallah|
> > > |Digital Designer |
> > > |EMC Corp. |
> > > |Hopkinton MA 01748|
> > > ********************
> > >
> > > **** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more
> > > help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****
> >
> > --
> > Ronald B. Miller _\\|//_ Signal Integrity Engineer
> > (408)487-8017 (' 0-0 ') fax(408)487-8017
> > ==========0000-(_)0000===========
> > Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA 95131
> > rmiller@brocade.com, rbmiller@sjm.infi.net
> >
> >
>
> --
> D. C. Sessions
> dc.sessions@vlsi.com
>
> **** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****

--
Ronald B. Miller  _\\|//_  Signal Integrity Engineer
(408)487-8017    (' 0-0 ') fax(408)487-8017
     ==========0000-(_)0000===========
Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA  95131
rmiller@brocade.com,  rbmiller@sjm.infi.net

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<!doctype html public "-//w3c//dtd html 4.0 transitional//en"> Hi DC

Make it a big cap.

The cap is used to keep from DC  loading the line.

The resistor provides the line AC termination.

Ron Miller

"D. C. Sessions" wrote:

Ron Miller wrote:
>
> Use tie all the common sides of the resistors together, and use one capacitor from the
> common point to ground.

Not exactly a Real Good Idea unless you have lots of timing margin.
The problem is that this creates a lot of jitter (edge times depend
on prior state of all the lines.)

> Kassem Abdallah wrote:
>
> > > Has anybody out of there any suggestion about the following problem? (I think it
> > > is quite a common one).
> > >
> > > I?ve got a board with a non-standard bus of 34 traces. The bus drives a group of
> > > memories.
> > > The  lenght  of  the  bus  is necessarily higher than the critical lenght (lcr =
> > > tr/2tpd):  a  termination could be useful. The problem: there are so many traces
> > > that  one  has to use too many components (34 resistors and 34 capacitors for AC
> > > parallel termination).
> > >
> > > What shall I do?
> > > Are there any special components (array) to terminate this type of bus?
> > > Shall  I  terminate the bus or not? (In past experience not always a termination
> > > was mandatory)
> >
> > I am not the expert on SI Issues, but there are several resistor_packs
> > for termination available from a variety of vendors. However, You have
> > to be very carefull, because these packs sometimes cause noise and make
> > things worst. It depends on how the resistors network is packaged for
> > current/GND leads.( I suggest to look carfully at the schematics and do
> > some noise analysis).
> >
> >
> >  Also, I "think" a 34-bit bus is not that WIDE, and if it is critical
> >  data path, you might be better off terminating with single loads( may
> >  be you can stick them on the backside of your board ?? It is a
> >  compromise).
> >
> > ********************
> > |Kassem M. Abdallah|
> > |Digital Designer  |
> > |EMC Corp.         |
> > |Hopkinton MA 01748|
> > ********************
> >
> > **** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more
> > help, put HELP.  si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****
>
> --
> Ronald B. Miller  _\\|//_  Signal Integrity Engineer
> (408)487-8017    (' 0-0 ') fax(408)487-8017
>      ==========0000-(_)0000===========
> Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA  95131
> rmiller@brocade.com,  rbmiller@sjm.infi.net
>
>

--
D. C. Sessions
dc.sessions@vlsi.com

**** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP.  si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****

-- 
Ronald B. Miller  _\\|//_  Signal Integrity Engineer
(408)487-8017    (' 0-0 ') fax(408)487-8017                 
     ==========0000-(_)0000=========== 
Brocade Communications Systems, 1901 Guadalupe Parkway, San Jose, CA  95131
rmiller@brocade.com,  rbmiller@sjm.infi.net
  --------------629813C88742E2EC2B44865B-- **** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****