You have an interesting thought. Generally, if you can put a small
predictable inductance in series with the load, you should be able to
measure the Ldi/dt drop across it, either directly or by mutual
I developed a method of measuring the drop across bonding wires in a
chip package and published it at the IEEE EMC Symposium in the last
few years. I forget the exact year, but it was one of the last three
years. The paper is listed under published works on my webpage. The
information in that paper might help.
On the in-situ current probe, if you build a current probe using
paths, you will most likely be measuring di/dt rather than i(t) as the
drop across the wire is Ldi/dt or as picked up, Mdi/dt. However you
can tell a lot from the di/dt waveform, and many modern scopes can
integrate it for you.
Pat Zabinski wrote:
> I checked this out and a previous "tidbit" on your wed site, and
> it got me thinking about a problem I've got right now in the
> I'm experimenting with some power delivery issues, where I
> have a controllable (both output impedance and risetime)
> SSN chip attached to a two-layer board. The hope in this
> experiment is to gain insight in power delivery (i.e., charge
> storage) to buffers, particularly during logic transitions.
> Right now, we are measuring the VDD and VSS currents to/from
> the SSN chip by placing a 1 ohm resistor in series with
> the supplies, then measuring the voltage across the resistor
> with a 10X (500 ohm) probe. However, the resistor adds
> some unwanted parasistics (particularly inductance), and I'm
> looking for a way to get around this.
> Have you ever seen an "in-situ" current probe in a PCB? Meaning,
> is it possible/practical to use multi-layer routing to essentially
> create a current probe within the board?
> My board has VSS (Ground) on the top layer, and VDD is on
> the bottom layer. VDD comes up to the chip with a via. To
> measure the VDD current, I'd route a track around the VDD
> supply via on an inner layer. I'd then measure the
> current using a standard voltage probe across the ends of
> this track. For VSS, I'd use jumpers, vias, and inner layer
> routes to create the same loop around the VSS supply line/pin.
> Will this sort of in-situ current probe work? If so, what
> sort of problems do you expect I will run into?
> > Hi All,
> > I thought some of you might find my technical article of the month
> > interesting. It is on making voltage measurements with a current
> > probe. Over much of the useful frequency range of a current probe, its
> > output is not the current in the wire but rather the voltage drop
> > along the wire per unit length. The waveshape of the probe output is
> > that of the voltage drop along the wire (di(i)/dt), not the current in
> > the wire (i(t))!
> > If this sounds interesting, click on the current probe picture at the
> > bottom of the index page on my website at http://emcesd.com for a
> > technical discussion along these lines.
> > Doug
> **** To unsubscribe from si-list: send e-mail to email@example.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****
-- ----------------------------------------------------------- ___ _ Doug Smith \ / ) P.O. Box 1457 ========= Los Gatos, CA 95031-1457 _ / \ / \ _ TEL/FAX: 408-356-4186/358-3799 / /\ \ ] / /\ \ Mobile: 408-858-4528 | q-----( ) | o | Email: firstname.lastname@example.org \ _ / ] \ _ / Website: http://www.dsmith.org -----------------------------------------------------------
**** To unsubscribe from si-list: send e-mail to email@example.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****