Re: [SI-LIST] : Automatic/Semi-automatic design check of PCB layout database for

Mitch Morey (mitch.morey@nsicomm.com)
Thu, 02 Sep 1999 12:30:14 -0700

Good question Ron.

Let me give you my opinion. Try HyperLynx.

1) Compatability? very good
2) Simple to use? If you're familiar with the electronics of a PCB
3) Cost? ~$10K (5x (?) cheaper than Viewlogic's XTK)
4)Speed? Good enough for a "quickie"

Now, let's get to the bigger issues. One, why have you waited til the board was designed to do signal integrity checks? Even Hyperlynx will allow preplace and preroute analysis. Get in there and do some up front checks and drive
layout with your results. Two, what are you really after? Simple stuff like crosstalk and impedance (these should have already been determined by your engineering staff before the project was started), or proper loading,
terminations schemes, pwr/gnd plane capacitance, etc, etc, etc? There is a whole ball of string that goes into a "real" signal integrity checking system, so you need to realistically define what you're after and where in the
process you wish to perform whatever task you're after.

Good luck. At least you're headed down the right path. I know many, many, many companies that "talk" signal integrity, but do nothing. I'm sure you'll get many more responses.

Mitch
San Diego, CA

Ron Miller wrote:

> Hi Guys
>
> What technique or tools are being used for checking a new PCB layout database for simple
> mistakes, like excess crosstalk or "BIG" impedance mismatches before releasing a PCB
> for FAB.
>
> My focus is the housekeeping signals and lower speed busses, that we usually neglect but which
> can still bite us in the posterior, causing a new spin of artwork and FAB.
>
> Requirements in order of importance:
> 1. Compatibility with PCB databases like Allegro/Cadence
> 2. Simple to use, little or no training
> 3. Cost of acquiring
> 4. Speed of processing
>
> If there is not such a product someone needs to get busy.
>
> Ron Miller
>
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