RE: [SI-LIST] : IBIS models

Abe Riazi (ariazi@anigma.com)
Mon, 30 Aug 1999 19:06:36 -0700

Roy,

It is absolutely true that it is not "always" a simple task to
complete the pin mapping section. That is why I had used words such as
"in many cases" or "frequently" and had avoided "always".

There are many cases which allow an easy pin mapping completion
(requiring only the datasheet for referral to the device pinout and an
ASCII editor program for editing the IBIS file), for instance:

1. The model has only few pins .
2. There are many pins with identical I/O buffer models.

Almost in all cases, it is un-necessary to construct a pin mapping
section which includes every pin of the device, because only those pins
(together with their associated I/O buffers) required for the particular
simulation have to be taken into account.

On the other hand, it is also true that if the model consists of many
pins (necessary for simulation) it can be time consuming to repair this
type of model defect. Furthermore, If some buffer models are not
specified for a pin or ( its equivalent ) which must be utilized in a
simulation, then it may be impossible for the user to fix the problem.
The model supplier should then be contacted.


In your email you also refer to the following disclaimer statement
found in IBIS models:

"Data is for modeling purposes only---use at risk---not guaranteed"

Above disclaimer is one reason that I always carefully examine
(verify) each model before using it in SI simulations. A detailed
evaluation of a model can lead to identification of its deficiencies,
which may be broadly divided as:

1. Defects which can be fixed by the user without the aid of the
model developer.
2. Problems which require contacting the vendor.

An incomplete pin mapping section frequently (but not always)
belongs to the former type. On the other contrary, a missing (or
defective) parasitic section, I-V curves or VT tables often can not be
fixed by the user without contacting the model provider.

Regards,

Abe Riazi
ariazi@anigma.com

>----------
>From: Roy Leventhal[SMTP:Roy_Leventhal@mw.3com.com]
>Sent: Monday, August 30, 1999 6:41 AM
>To: si-list@silab.eng.sun.com
>Subject: RE: [SI-LIST] : IBIS models
>
>
>
>Abe,
>
>Not always so simple and convienient as you indicate. I agree with you for a
>device witha few tens of pins. But, for example, for a programmable device
>with
>several hundred pins it's a lot of tedious extra work for every user of the
>device. A lack of a proper pin list is just a lazy supplier's way of avoiding
>the same distasteful, resource consuming task their customers would find more
>cost effective if it were just figured into the price of the part.
>
>IBIS itself offers no real sanctions for non-compliance with any of its
>provisions. When the JEDEC committee tried laying down the law to suppliers
>they
>were quickly rendered irrelevant with the use of "supplier controlled,
>non-registered data sheets." Talk about a license to do anything at any time
>to
>your product with warning or data.
>
>I still haven't figured out what the disclaimer "Data is for modeling
>purposes
>only - - - use at own risk - - - not guaranteed," etc. Just what do suppiers
>think I should do to proceed with my design, improve its insensitivity to
>normal
>process variation, not overstress it, etc.?
>
>I don't get it. I thought that IBIS was an agreement between semiconductor
>supplier and software suppliers to provide an improved means for exchanging
>data
>with their customers so that they could all suceed together. How do
>half-assed
>pin list help that objective?
>
>
>Best Regards,
>
>Roy
>
>
>
>
>
>
>Abe Riazi <ariazi@anigma.com> on 08/28/99 11:30:01 AM
>
>Please respond to si-list@silab.eng.sun.com
>
>Sent by: Abe Riazi <ariazi@anigma.com>
>
>
>To: "'si-list @silab.eng.sun.com'" <si-list@silab.eng.sun.com>
>cc: (Roy Leventhal/MW/US/3Com)
>Subject: RE: [SI-LIST] : IBIS models
>
>
>
>
>>Mike Mayer Wrote:
>>
>>I have found several IBIS models that use the [Pin] keyword but only
>>model a couple of pins. For example, an octal buffer in a 20-pin
>>package that only includes statements for one buffer input pin, one
>>buffer output pin, Vcc and Gnd. My reading of the IBIS spec would say
>>that this is non-compliant. In Section 5 under "Usage Rules" for the
>>[Pin] keyword the first sentence states "All pins on a component must
>>be specified.".
>>
>>1) Am I correctly interpreting the IBIS specification?
>>
>>2) How common are models of this type?
>>
>>--
>Hi Mike:
>
>What you have described is one of the most common types of model
>deficiency I have observed in IBIS models. however, in many cases it is
>quite simple to fix this kind of model defect. Frequently, all that is
>required to complete the pin mapping section of the model is the
>datasheet of the device and an ASCII file editor.
>
>Regards,
>
>Abe Riazi
>>ariazi@anigma.com
>>
>
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