Re: [SI-LIST] : Stackup Extraction
Jeff Seeger (firstname.lastname@example.org)
Mon, 16 Aug 1999 15:19:37 -0400
Pat Zabinski wrote:
> snip <
> #2 - I've been using Allegro for eight years for everything from
> single chip packages to MCMs to large PCBs, and I have rarely
> entered the material parameters into the tool. Although Allegro
> does have an integral tool that spits out some basic parasitics
> for lines (Z0, C, L, Td, etc.), I have never relied on it. The
> only time I've ever entered in the material parameters/thicknesses
> is for documentation purposes. Because it is not necessary
> to enter in the cross section (i.e., it's an extra unnecessary
> step), I'll venture a guess that many other designers avoid
> entering it as well.
You may want to re-think how you are using Allegro.
Since version 12, Allegro has had an embedded 2D solver,
and the DRC for delay rules relies on this solver (and
the stackup information) if rules are expressed in time.
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
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