First Opinion -
In the paper, simulations were performed on PCBs
with no ground stitching around the board periphery
and with stitching around the board periphery.
Now unfortunately I missed the Symposium so I'm going
by the article written up in the Symposium Record.
And unfortunately for me my eye only sees a real
significance between the two simulations at specific
frequencies. That is to say unless I was having a
problem with a specific frequency and through
simulation I was confident that by stitching the
board the problem might be mitigated, I would not
incorporate the use of peripheral stitching of a
PCB as a normal design criteria. The paper also
suggests, my opinion, that periphery stitching
could without regard to careful planning might
cause problems to worsen.
Second Opinion -
The paper seems to suggest another serious mechanism
for crosstalk. If resonances of the board and signal
frequency are matched, signal integrity could very
well be compromised if sensitive areas of the board
or traces happen to coincide with resonance nodes.
The paper is based on a rather simple clearly repeatable
experiment and fundamental principles. In other words,
I'd find it difficult to punch holes in any of it.
My questions to the group are -
1. Has anyone serious doubts about periphery stitching
from personal experience? Pros/Cons?
2. Has anyone had rather mysterious problems that
could be easily explained as the paper presents?
I know of one company having done serious board
resonance analysis that produces extremely quiet
Pentium based motherboards at a 10 meter site.
Like down below the Class B level with no case
protection. Specifics of the testing I won't get
into. I'm not sure what their philosophy is
concerning periphery stitching.
General discussion is all that's expected.
Disclosure of company confidentiality is of
course assumed to be prohibited.
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