In addition to the stack up changes that have been mentioned, I would cut
isolation rings in the ground and power planes to separate the RF and Digital
sections of the board. Noise induced in the ground plane in one part of the
circuit can capacitively couple into components in the RF section if you are
not careful. By cutting a slot in the plane, you can steer ground and power
currents around the more sensitive portions of your circuit. Another thing
that will help isolate the digital signals from the RF is to use small-swing
differential logic levels, such as LVDS, rather than fast CMOS wherever
possible.
Mark Sauerwald
National Semiconductor
**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****