From: Guang-Tsai Lei [SMTP:firstname.lastname@example.org]
Sent: Monday, August 02, 1999 12:55 PM
Cc: Lei, Guang T.
Subject: Re: [SI-LIST] : coming up with average power estimates for buffers
I'm not sure what kinds of detectors have been used to measure the power
voltage in your experiments. I'll make the following two points as your
1) The RMS is used frequently in power estimates when instant voltage or
current is measured. Because if you simply take the average of instant
voltage or current samples, you only get the DC component of the variable.
The RMS scheme converts the instant voltage or current into the equivalent
voltage or current respectively in terms of the averaged power produced
2) Considering power delivered through a transmission line and assuming the
generator impedance is fixed, to get maximum power (delivered to the load),
the conjugate-matching condition is necessary, i.e. the real part of the
generator impedance should equal to the real part of the input impedance
looking into the line from the generator and the line joint and the
part of the generator impedance should equal to complex conjugate of the
imaginary part of the input impedance. (The line is often connected with a
load.) Changing a transmission line length is equivalent to changing the
On Aug 2, 10:57am, Pat Zabinski wrote:
> Subject: [SI-LIST] : coming up with average power estimates for buffers
> I'm working on a rather large system (over 50,000 Watts!), and we
> are trying to come up with some detailed power estimates for
> each component.
> The system is essentially comprised of LOTS(!) of identical
> parallel processing ASICs, each ASIC having roughly 600 I/O.
> The basic I/O is full-swing CMOS with a 2.5 VDD supply running
> at roughly 100 Mbps. A small change in one ASIC will have
> a three-orders of magnitude higher impact on the system, so we need
> to pay very close attention to details. The I/O have been
> designed and tweaked to account for impedance, edge rates,
> packaging effects, etc., so we have a high level of confidence
> they are going to work; at this point, we simply need to
> obtain a power estimate for them.
> In order to come up with good system-level power estimates (which
> will determine cooling requirements and power supply requirements),
> we need to have an accurate ASIC power estimate. We've got pretty
> good numbers for the core circuitry, but we're trying to develop
> an estimate for the custom I/O buffers.
> To get the power for one buffer, we simulate the buffer with
> a 1010101... pattern, toggling every possible bit period.
> The buffer is loaded with an average-length transmission
> line, and we use spice to plot the power vs time for at
> least two bit-transitions. Overall, we get a power
> vs time plot that is relatively flat except during the logic
> transitions (no surprise here), and the peaks vary in amplitude
> depending upon a rising or falling edge.
> In the past, we have used the "simple average" power, meaning
> taking the integral of the power over two bit periods (to ensure
> we've captured one falling and one rising edge)and dividing
> it by the time. We have used this figure as
> our average power for the worst-case-bit-pattern.
> However, a colleague recently suggested using the "RMS average"
> of the power, which is computed slightly differently. For our
> case, the RMS average resulted in a power estimate that was
> 50% higher than the average value.
> >From my experience, taking the integral of the power curve will
> result in the effective energy consumed by the buffer, and dividing
> this by the time will provide the average power. However,
> RMS is used so frequently in power estimates, I could not provide
> a good answer why it shouldn't be used.
> Can anyone tell me how to best determine the average power
> for a buffer? Am I anywhere on the right track? Which is better,
> simple average or RMS average?
> One other point to note: as we increase the transmission line
> length, the RMS power goes up as well (as expected). However,
> this trend continues to a certain point, then the power actually
> reduces with increased line length. Can someone explain why
> the RMS power would be reduced with increased length? We're only
> seeing a small percentage change (~10-20%), but it's got
> me curious.
> Pat Zabinski
> Pat Zabinski ph: 507-284-5936
> Mayo Foundation fx: 507-284-9171
> 200 First Street SW email@example.com
> Rochester, MN 55905 www.mayo.edu/sppdg/sppdg_home_page.html
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>-- End of excerpt from Pat Zabinski
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