Re: [SI-LIST] : HSTL voltage levels

Matt (boomer@lsil.com)
Fri, 30 Jul 1999 10:31:58 -0500

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hi,

You must have the supply to the HSTL buffer incorrect
or you are actually using SSTL2.

The High supply for HSTL should be 1.5V

matt

fabrizio zanella wrote:
>
> Hello,
> can someone share experiences with using HSTL as an I/O buffer for driving
> point to point at 100MHz and faster? What confuses me are the Vref and Vtt
> values specified in the HSTL Jedec spec and in data sheets from
> manufacturers - Vref=0.9v, Vtt=1.5v. I have performed some measurements
> and simulations with the specified Vref level of 0.9V and it does not make
> sense, the signal swings I see are from 0.7 to 2.5V, therefore there is no
> margin at the low side. Is it possible to change Vref to 1.5V, like with
> SSTL and GTLP technologies?
>
> thanks very much,
>
> Fabrizio Zanella
> EMC, Hardware Engineering
> fzanella@emc.com
> 508-435-2075, x4645
>
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