RE: [SI-LIST] : Best type of models, edge rates & load

Abe Riazi (ariazi@anigma.com)
Thu, 22 Jul 1999 09:39:50 -0700

Hi:

When referring to the loads related to creation of an IBIS Model, it
is important to distinguish between the following two types:

I. Loads used for determination of rising and falling waveforms.
II. Timing test loads.

In regard to the former, there is excellent information available in
the IBIS specification documents, IBIS cookbook, and the man page of
IBIS2XTK. The optimum load depends on the technology of device (i.e.
TTL, CMOS, etc.) and the desired quality (i.e. linear, simple nonlinear,
and enhanced nonlinear, where this classification applies to associated
XTK models after IBIS2XTK translation).

Regarding the timing test load, the model developer should first refer
to the datasheet of the device, and then specify the timing parameters
accordingly.

Above loads are applicable during the development phase of the model.
After the model has been completed, during the testing (verification)
phase, other types of loads come into consideration. I saw an email in
this thread, suggesting use of a long open transmission line as a load,
which is indeed a good idea at this stage.

For purpose of timing analysis and computation of the hold and setup
time budgets, it is essential to understand that the timing parameters
obtained by means of simulation utilizing the IBIS model (for example
the flight time data) should be synchronized with those timing elements
which are unavailable in the model and must be extracted from the
datasheet (such as Tco, Tsetup, Thold, etc).

The subject of this thread being "Best types of models, .....", I
like to emphasize few points towards creation and verification of good
IBIS models:

1. Timing parameters (i.e. Vmeas, Vref, Rref, Cref) should be
accurately specified, consistent with the test load given in the AC
timing section of the data sheet.

2. For generating the rising and falling data use fixture parameters
which meet following requirements:

V_fixture - (Vcc or GND) <=0.7 V
3.0 <R_fixture<30.0 (TTL to Vcc)
200 < R_fixture < 1000 (TTL to GND)
25.0 < R_fixture <200 (CMOS)
L_fixture = 0.0 nH
C_fixture = 0.0 pF

3. The parasitic parameters (R_package, C_package, L_package, R_pin,
L_pin, C_pin) should be accurately given for all three corners (i.e.
Min, Typ and Max).

4. The GND_clamp and POWER_clamp tables should be consistent with
datasheet . I have seen IBIS models without POWER_clamp data, when the
actual device included internal clamping diodes to Vcc.

5. Examine the pullup and pulldown curves for V=0, I = 0 crossing.

6. Inspect the I-V and VT data for monotonic behavior and lack of
discontinuities.

7. Check the model file using the ibis golden parser and make sure
that it does not fail the syntax and format tests.

In conclusion, a model developer should be well familiar with the IBIS
documents and the datasheet of the device. He or she should be also
willing to devote sufficient time and effort required for creation and
testing of a flawless model.

Best regards,

Abe Riazi
Anigma, Inc.

>----------
>From: Mark Nass[SMTP:markn@rccorp.com]
>Sent: Tuesday, July 20, 1999 5:33 AM
>To: si-list@silab.eng.sun.com
>Subject: [SI-LIST] : Best type of models, edge rates & load
>
> There has been some discussion recently about parameters of parts
>specified into 40pf caps and accuracy of models. I generate this type
>of data for our devices for our own use and our customers. So I am
>curious as to what people think would be the optimal way to generate
>Tco, Tsu, jitter parameters and IBIS models so that they would be confident
>they were getting exactly what they needed for signal integrity and timing
>analysis. Any feedback?
>
>Mark Nass
>
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