RE: [SI-LIST] : Best type of models, edge rates & load

Mark Nass (markn@rccorp.com)
Wed, 21 Jul 1999 08:44:18 +0100

Tco is Time Clock to Out

mark

At 08:07 AM 7/21/99 -0400, you wrote:
>
>As mentioned in this thread, C-Lumped test loads are not generating
>realistic numbers. BUT, this lumped test load should be in the IBIS model
>(Cref, Rref). Some SI tools adjust the analysis based on an unloaded
>waveform. They throw out the lumped stuff. It seems an effective work-around
>(we get good correlation between sim's and measured). Now this doesn't help
>the data sheet, but it does help the simulation.
>OK - time for a dumb question : what is Tco?
>
>Jim Peterson
>jfpeterson@space.honeywell.com
>Honeywell, Space Systems Division, M/S 934-5
>13350 US 19 N., Clearwater, FL, 34624
>727-539-2719
>
>
>
>-----Original Message-----
>From: D. C. Sessions [mailto:dc.sessions@vlsi.com]
>Sent: Tuesday, July 20, 1999 5:33 PM
>To: si-list@silab.eng.sun.com
>Subject: Re: [SI-LIST] : Best type of models, edge rates & load
>
>
>Mark Nass wrote:
>>
>> There has been some discussion recently about parameters of parts
>> specified into 40pf caps and accuracy of models. I generate this type
>> of data for our devices for our own use and our customers. So I am
>> curious as to what people think would be the optimal way to generate
>> Tco, Tsu, jitter parameters and IBIS models so that they would be
>confident
>> they were getting exactly what they needed for signal integrity and timing
>> analysis. Any feedback?
>
>If you had to pick just one load, it would be 50 ohms. Notice I didn't
>write "50 ohms and 30 pf" or anything like it. To get the best sims we
>need the high-frequency content of output waveforms, and artificially
>filtering it out by adding a lowpass is not exactly helpful.
>
>Of course, we need both the turnon and turnoff responses for both
>the pullup and pulldown paths, so that's four tables (rising into
>50 ohm pullup, falling into 50 ohm pulldown, rising into 50 ohm pulldown,
>and falling into 50-ohm pullup.
>
>Output timing should be to the 10% (initial) point of the edge. That's
>easy to plug in as Vmeas so that the timing numbers add up, and also
>easy enough to measure on a tester so that you're actually testing to
>the critical design parameter.
>
>No lumped caps anywhere (was this a surprise?)
>
>--
>D. C. Sessions
>dc.sessions@vlsi.com
>
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>

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