Would you please explain your statement, "Actually it would be more accurate
to get the VT data with out even the
buffer capacitance." It seems to me that removing capacitance that exists
is as bad as adding capacitance that doesn't exist.
Regards,
Weston Beal
Signal Integrity Engineer
Compaq Computer Corp.
-----Original Message-----
From: Mellitz, Richard [mailto:[email protected]]
Sent: Tuesday, 20 July, 1999 11:54 PM
To: '[email protected]'
Subject: RE: [SI-LIST] : Best type of models, edge
rates & load
Actually it would be more accurate to get the VT data with
out even the
buffer capacitance. That raises some interesting testing
problems when it
comes to determining real Tco. The problem is that the
behavioral models are
most accurate when the Tco, VT, and IV is defined at the
load of the target
design.
Richard Mellitz
Intel
-----Original Message-----
From: Mark Nass [mailto:[email protected]]
Sent: Tuesday, July 20, 1999 11:57 AM
To: [email protected]
Subject: Re: [SI-LIST] : Best type of models, edge rates &
load
We are not a foundry, just design the logic and rely on
the foundry to
provide
HSPICE models. No magic with the models just use HSPICE
models and vary the
process and temperature.
Weak models are > Slow process, high temp and low voltage
typical models are > typical process, nominal temp & voltage
Strong models are > Fast process, low temp and high voltage
I have no control over the accuracy of the HSPICE models,
they come from
the
foundry. I am just curious if any knowledgeable people out
there have
definite
ideas on which parameters are best for generating Tco values
and IBIS models
that they have had good results with. I think I hear
everybody agreeing that
40pf is not useful, so then my question is what is useful?
Mark
At 04:58 PM 7/20/99 -0500, you wrote:
>
>
>Mark Nass wrote:
>>
>> There has been some discussion recently about
parameters of parts
>> specified into 40pf caps and accuracy of models. I
generate this type
>> of data for our devices for our own use and our
customers. So I am
>> curious as to what people think would be the optimal way
to generate
>> Tco, Tsu, jitter parameters and IBIS models so that they
would be
confident
>> they were getting exactly what they needed for signal
integrity and
timing
>> analysis. Any feedback?
>>
>> Mark Nass
>
>
>Mark,
>
>Can your provide the SI community some insight on how you
generate these
>parameters now. Specifically, do you take measurements on
a number
>of different samples over temp/voltage ranges and with
different loads?
>Are they SPICE derived? Do you specify a certain amount of
'cushion'
>in the parameters? This might be helpful to those of us
who don't know
>how vendors derive the numbers.
>
>Thanks,
>David Haedge
>Raytheon
>
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