RE: [SI-LIST] : Best type of models, edge rates & load

Beal, Weston (Weston.Beal@COMPAQ.com)
Wed, 21 Jul 1999 09:24:23 -0500

D.C.,

Normally I agree with most of your opinions and respect your experience, but
think there's a flaw in your statement here. "Output timing should be to the
10% (initial) point of the edge. That's easy to plug in as Vmeas so that
the timing numbers add up..." The problem here is that we need a time for
rising and for falling. If we measured Tco at the 10% deviation for initial
voltage we would have to measure to two different voltages. There is only
one Vmeas parameter in IBIS. That's why IBIS authors usually pick 1/2*Vcc
or something close. If the timing reference load is resistive, then Vmeas =
1/2*Vcc should work just fine, right?

Later,
Weston Beal
Signal Integrity Engineer
Compaq Computer Corp.

-----Original Message-----
From: D. C. Sessions [mailto:dc.sessions@vlsi.com]
Sent: Tuesday, 20 July, 1999 4:33 PM
To: si-list@silab.eng.sun.com
Subject: Re: [SI-LIST] : Best type of models, edge
rates & load

Mark Nass wrote:
>
> There has been some discussion recently about parameters
of parts
> specified into 40pf caps and accuracy of models. I
generate this type
> of data for our devices for our own use and our customers.
So I am
> curious as to what people think would be the optimal way
to generate
> Tco, Tsu, jitter parameters and IBIS models so that they
would be confident
> they were getting exactly what they needed for signal
integrity and timing
> analysis. Any feedback?

If you had to pick just one load, it would be 50 ohms.
Notice I didn't
write "50 ohms and 30 pf" or anything like it. To get the
best sims we
need the high-frequency content of output waveforms, and
artificially
filtering it out by adding a lowpass is not exactly helpful.

Of course, we need both the turnon and turnoff responses for
both
the pullup and pulldown paths, so that's four tables (rising
into
50 ohm pullup, falling into 50 ohm pulldown, rising into 50
ohm pulldown,
and falling into 50-ohm pullup.

Output timing should be to the 10% (initial) point of the
edge. That's
easy to plug in as Vmeas so that the timing numbers add up,
and also
easy enough to measure on a tester so that you're actually
testing to
the critical design parameter.

No lumped caps anywhere (was this a surprise?)

--
D. C. Sessions
dc.sessions@vlsi.com

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