Re: [SI-LIST] : response to semiconductor I/O edge rates

D. C. Sessions (dc.sessions@vlsi.com)
Fri, 16 Jul 1999 15:44:02 -0700

Roy Leventhal wrote:
>
> All,
>
> You guys keep hitting on Texas.
>
> Actually, Fairchild developed the planar process and heavily influence the whole
> specsmanship thing. Their ideas included making specs so wide you couldn't
> possibly miss and universal devices that would play in any application. Then
> crank the diffusion furnaces to just under melting temperature so you could slam
> the wafer boats in & out faster.

All right, you win. Archaeologists have recently unearthed drawings of 45-pf
test loads in caves near the Dead Sea, which themselves claim to have been
faithfully copied by generations of component engineers from silicaceous
originals.

> Shall I go on? I'm getting cranked.
>
> Then the military got into the act (MIL-SPEC) and froze everything at the level
> of training and experience, figurativly speaking, of a three year old. Before
> long we had a tradition.
>
> Tradition, Tradition.

So, Rebbe, is there a blessing for the 45-pf load?

-- 
D. C. Sessions
dc.sessions@vlsi.com

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