Re: FW: [SI-LIST] : METASTABILITY IN FLIP FLOPS

Steve Weir (weirsp@a.crl.com)
Thu, 15 Jul 1999 13:53:32 -0700

I believe that the Intel demonstrations was conducted as part of a Wyle
promotion: "Steak and PLD's", in the when Intel was selling PLD's, circa
1991. What I remember is that they were pitching the value of two register
levels when very very low metastable event rates were required.

The demo fixture had a sample clock of 10MHz, and an adjustable event clock
of approximatlely 1MHz, and a simple correllator to detect metastable
events. With a single FF, and the event clock free-running an event would
occur about once every four hours. However, by slaving the event clock,
and walking the phase of the event into the Tsu window of the sampler, the
metastable rate ran to a high percentage of the event rate. I believe that
fixture also had a two FF set-up, which under the same conditions did not
demonstrate failures.

Regards,

Steve.

At 07:07 PM 7/15/99 +0200, you wrote:
>"Johnson, David" <david.johnson@intel.com> writes:
>> It's interesting to experiment with just how long a real flip-flop in a real
>> lab can actually be "persuaded" to stay metastable when deliberately nudged
>> into such a state in a highly controlled manner. I vaguely recall that
>> Intel may have done such experiments a long time ago and succeeded, in an
>> extremely low-noise environment with extremely finely adjustable timing, in
>> getting a simple "74S" series flip-flop to stay metastable for four hours
>> (!) before it either snapped back to a valid state or the experiment was
>> terminated.
>
>I find this extremely hard to believe. In order to be useful with
>asynchronous inputs, flip-flops should have internal positive feedback
>(dynamic ones usually don't). Then the probability of metastability
>decreases exponentially with time, measured in time constant units. If
>I recall correctly, this time constant is the reciprocal of the
>flip-flop's gain bandwidth product, or in other words the feedback
>loop delay divided by the open-loop gain. The time constant is
>probably a few picoseconds in state-of-the-art CMOS.
>
>When you connect two flip-flops after each other, and only use the
>last output, you essentially double the available time for positive
>feedback. As the relationship is exponential, this could mean an
>improvement from a MTBF of once per second to once in the lifetime of
>the universe. I would expect that Hamlet manuscript from those famous
>apes before seeing four _seconds_ long metastability in a usable
>flip-flop.
>
>Best regards,
>--
>Per Torstein Roeine email: perr@ifi.uio.no
>University of Oslo phone: +47 22 85 24 52
>Dept. of Informatics, Microelectronics Group fax: +47 22 85 24 01
>Box 1080 Blindern, N-0316 OSLO, NORWAY
>
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