I need to reduce the complexity of a very complex spice model to use in
another larger circuit.
The present model has arrays of 16 cmos transistors in about a dozen places
on the schematic.
If the models were electrical based I could scale the parameters to reduce the
arrays to one part. However, the models I have are dimensional.
So, the two approaches I see are :
1. Simulate the model all by itself to generate a response, and then
Optimize an assumed electrical circuit to give the same response. or
2. Use a SPICE to IBIS conversion, and then convert back to SPICE
with an IBIS to SPICE conversion.
Since I have never used IBIS, and have not kept up to date with SPICE over
the last 20 years, I do not have a feel for how much time this will take.
Does anyone have a feel for this.
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