Re: [SI-LIST] : Edge rates

Roy Leventhal ([email protected])
Thu, 15 Jul 1999 11:38:29 -0500

Jay,

Exactly parallel to your testimony on edge rates is the conditions that existed
(stilll exist?) in the RF transistor market.

Designers would implement tuned circuits, filters, power supply bypass networks,
etc., based on a certain Ft (proportional to bandwidth, proportional to edge
rate) or frequency of zero db gain crossing. All such networks have designed-in
self resonances or self resonances due to parasitics. Their proper operation was
often predicated on the gain of the transistor having "rolled off" when the
bypass elements, etc., were well past self-resonance and could no longer provide
the correct electrical characteristics.

Countless tales of woe were heard from designers where Purchasing had gotten
parts from a 2nd source with much faster (=better?) parts or where die shrink
(=faster) had lowered the cost of the parts.

Best Regards,

Roy

[email protected] on 07/15/99 09:24:55 AM

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Subject: [SI-LIST] : Edge rates

I appreciated Jan Vercammen sharing his edge rate data with the group; it's nice
to have some real data that's without the usual marketing spin. One caution
based on my own measurements is that one should not assume that logic families
sourced from multiple suppliers will have the same characteristics. There are
many different kinds of cross-license agreements that range from mask sharing
(same circuit topology and device geometries, but may be different process) to
only what I would call name-sharing (same DC specs. and prop. delays, different
functions, and VERY different edge rates). To illustrate the latter case using
ABT (an instance of name-sharing), which at least originally was built by two
suppliers (TI and Philips), the rise and fall times for the one supplier's parts
were at best half of those from the other. According to the one supplier, their
engineers had designed edge rate control into their drivers, where the other
supplier either had not, or had used different assumptions. Edge rates or
rise/fall times were not included in datasheets at that time, but have more
recently been included in some cases.

One also must worry about what happens when someone gets the idea to cost reduce
the parts by building them in some new, smaller feature size IC process, which
reduces device capacitance and therefore rise/fall times (without edge rate
control). I've been (as many other IBM designers have) an advocate of edge rate
control for a long time, because at some point everything becomes a transmission
line otherwise. Some circuit designers listen better than others.

Jay Diepenbrock

Senior Engineer
Interconnect Technology & Qualification
IBM Global Procurement, B8UA/061, RTP, NC
Phone: 919-543-8804 Fax: 919-543-3642
Email: [email protected]

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