But how does that support your contention "that increased edge rates as a consequence of semiconductor die shrinkage, not application need, is the opposite of job security for SI engineers." It seems to me that this causes
greater need for SI engineers. Where did I miss the boat?
Regards,
Aubrey Sparkman
Roy Leventhal wrote:
> Bob,
>
> It is exactly my contention that increased edge rates as a consequence of
> semiconductor die shrinkage, not application need, is the opposite of job
> security for SI engineers.
>
> I am certain that semiconductor manufactures are not intentionally making my job
> harder.
>
> But, the winners in this game will be a team consisting of semiconductor
> manufacturer plus circuit designer who get the neatest, lowest cost widgets to
> market fastest and without fuss.
>
> Best Regards,
>
> Roy
>
> Robert Tsai <[email protected]> on 07/12/99 04:24:02 PM
>
> Please respond to [email protected]
>
> Sent by: Robert Tsai <[email protected]>
>
> To: [email protected]
> cc: (Roy Leventhal/MW/US/3Com)
> Subject: Re: [SI-LIST] : Some Semiconductors are Unnecessarily Fast
>
> Roy Leventhal wrote:
>
> > Several recent threads have commented that few nets on a board used to be a
> > signal integrity challenge in the past and now almost all are.
> >
> > What we are seeing are a number of instances where the semiconductor companies
> > are producing parts with edge rates way faster than the clock and application
> > calls for. Parts with 500ps rise times or less and clock periods of 100ns or
> > more. SI engineers are seeing more demand for their skills what with shrinking
> > geometries and lack of (care? concern?) edge rate control on drivers.
> >
> > But, this is "make work" and is not the road to world class competitiveness
> for
> > our companies. There are enough real world signal integrity problems for us to
> > tackle without any "help" of this sort from the semiconductor manufactures.
> >
> > Roy Leventhal
> >
> > **** To unsubscribe from si-list: send e-mail to [email protected].
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>
> Hi Roy,
>
> As many of you already know that the edge rate is directly related to the
> channel length of the drivers. When the semiconductor technology shrinks its
> feature sizes from 0.5 to 0.35 to 0.18 um the edge rate goes up accordingly.
> Unless special designs are implemented to intentionly slow down the edge rate,
> the edge rate will keep going up. We are not making everybody's life tough
> purposely.
>
> Think positively, this is job security for all of you.
>
> Robert Tsai
>
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