Roy Leventhal wrote:
> Several recent threads have commented that few nets on a board used to be a
> signal integrity challenge in the past and now almost all are.
>
> What we are seeing are a number of instances where the semiconductor companies
> are producing parts with edge rates way faster than the clock and application
> calls for. Parts with 500ps rise times or less and clock periods of 100ns or
> more. SI engineers are seeing more demand for their skills what with shrinking
> geometries and lack of (care? concern?) edge rate control on drivers.
>
> But, this is "make work" and is not the road to world class competitiveness for
> our companies. There are enough real world signal integrity problems for us to
> tackle without any "help" of this sort from the semiconductor manufactures.
>
> Roy Leventhal
>
> **** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****
-- Philippe Poulet Hardware Engineer RICOH Corp 2071 Concourse Dr San Jose CA95131-1817 Ph: (408) 944-3347 Fax: (408) 434-5390
**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****