[SI-LIST] : SI job position open at Stratus in Maynard, MA ==> else delete

Mango, Steve (Steve_Mango@stratus.com)
Mon, 12 Jul 1999 10:22:58 -0400

Several companies are downsizing, so I would like to extend this offer to
fellow si-list subscribers who may be job seeking.......

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I am the hiring manager of a Signal Integrity Design Group at Stratus, now
located in Mayard, Ma.

I have an immediate opening for an experienced SI engineer. {If you have
less experience than that called out for this particular job opening, but
you are interested in other SI positions at Stratus, please send me your
resume since I may be shortly opening a requisition for a less experienced
SI engineer.}

The job description for the experienced SI engineer position follows:

Be a major contributor within a signal integrity design team. Work with
minimal technical supervision to define/diagnose/solve complex signal
integrity problems (system clocking, interconnect design, transmission line
termination techniques, timing, power/ground distribution and decoupling,
ASIC I/O cell selection, ASIC package and pinout selection, connector
selection and pinout definition, parasitic minimization, etc.). Provide
technical leadership to more junior members of the team. Lead projects as
well as participate on project teams as an individual contributor

Minimum 8 years (10 years or more preferred) experience in the field of
signal integrity and analog issues related to high speed digital printed
circuit board design. Candidate should have hands on experience with
modeling and simulating with SPICE (HSPICE preferred) and/or Quad Design
(Viewlogic) TLC/XNS software and/or Mentor Graphics Interconnectix simulator
and/or SpectraQuest. Experience with electromagnetic field solvers (such as
Ansoft or Greenfield) and high speed board routers is also desirable.
Experience with static timing verifiers (Motive/Blast/Prime Time) is
desirable. Also, experience with Cadence Allegro and/or CCT PCB layout
routers is a plus. Candidate should also be familiar with high speed board
test plan generation and test measurement techniques (e.g., measure
crosstalk, impedance, simultaneous switching effects, ...) Experience with
designing high speed digital buses (100MHz+) and knowledge of numerous logic
families (GTL+, LVDS, PECL, etc). Experience with designing clock
generation and distribution networks (including knowledge of techniques to
quantify and reduce clock skew and jitter) is also a major plus.
Knowledge of controlled impedance printed circuit board design and
fabrication.

About Stratus:

Stratus Computer is the premier supplier of computer systems and services
where continuous availability, accuracy and reliability are business
mandates. In a world where a few short minutes of downtime can spell
disaster, business enterprises rely on Stratus' fault tolerant hardware,
operating systems and remote service capabilities to provide continuous
availability for their most mission-critical applications. Stratus customers
form the ranks of the world's industry leaders. On securities trading
floors, at retail and wholesale banks and ATM's, in healthcare and insurance
organizations, in airline terminals and reservations agencies, in emergency
dispatch centers, at entertainment and gaming locations, and at every point
in the retail/distribution supply chain, you'll find Stratus driving the
applications that fuel business growth.

Visit our web site at www.stratus.com

Thanks!

Steve Mango
Manager
Analog/SI/CAE Tools/PCB Place & Route

Call me if you wish at (978) 461-7631
Or email me at steve_mango@stratus.com

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