Re: [SI-LIST] : LVDS to Differential LVPECL conversion?

John Lipsius (jlipsius@cyras.com)
Sun, 11 Jul 1999 17:13:38 -0700

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Consider this closed. I found that PECL receivers that can=20
operate at 3.3V (Moto MC100LVEL17) are defined with a=20
vCMR and vID that LVDS meets easily.

----- Original Message -----=20
From: John Lipsius=20
To: si-list posting=20
Sent: Saturday, July 10, 1999 7:22 PM
Subject: [SI-LIST] : LVDS to Differential LVPECL conversion?

Hello All,
=20
Presently, I've not found yet any IC that performs=20
LVDS to LVPECL conversion. Just need one pair=20
converted.=20
=20
My current strategy is to use the following passive method:

(50 ohm system; the following applies to each=20
line in the LVDS diff. pair)

short segment with :
10pF in series then a VBB bias of 680ohm pullup to 3.3v=20
and 1Kohm pulldown to VEE(gnd).

schematically:
LVDS input----cap---bias---LVPECL diff. driver for fanout on pcb=20

Q1: Seem ok (provided all the other SI rules followed)?=20
=20
Q2: Is use of a ferrite bead between pullup and/or pulldown=20
resistor and its plane, to filter out noise at the VBB=20
bias point, a good idea or just overkill?

Thanks,
John Lipsius
MTS
Cyras Systems, Inc.
510-623-6631

=20

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Consider this closed.  I found = that PECL=20 receivers that can
operate at 3.3V (Moto MC100LVEL17) are = defined with=20 a
vCMR and vID that LVDS meets = easily.
 
 
----- Original Message -----
From:=20 John = Lipsius=20
To: si-list posting
Sent: Saturday, July 10, 1999 = 7:22=20 PM
Subject: [SI-LIST] : LVDS to = Differential=20 LVPECL conversion?

Hello All,
 
Presently, I've not found yet any IC = that=20 performs
LVDS to LVPECL conversion.  Just = need one=20 pair
converted.
 
My current strategy is to use the following passive method:
 
(50 ohm system; the following applies = to each=20
line in the LVDS diff. = pair)
 
short segment with :
10pF in series then a VBB bias of = 680ohm pullup to 3.3v
and 1Kohm pulldown to VEE(gnd).
 
schematically:
LVDS input----cap---bias---LVPECL = diff. driver=20 for fanout on pcb
 
 
Q1:  Seem ok  (provided all = the other=20 SI rules followed)?
 
Q2:  Is use of a ferrite bead = between pullup=20 and/or pulldown 
       = resistor and=20 its plane, to filter out noise at = the VBB=20
       = bias=20 point,  a good idea or = just=20 overkill?
 
 
Thanks,
John Lipsius
   = MTS
Cyras=20 Systems, Inc.
510-623-6631
 

 
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