[SI-LIST] : low jitter PLL ?

john lipsius ([email protected])
Wed, 02 Jun 1999 21:03:34 -0700


Does anyone know of a low-jitter PLL commercially
available for 78MHz clock buffering/noise-filtering

For distribution on a pcb.

The intrinsic jitter generated should be in the 20ps RMS range,
if possible.

John Lipsius
Member Technical Staff
Cyras Systems, Inc.
46832 Lakeview Blvd.
Fremont, CA 94538

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