Re: [SI-LIST] : Capacitance in a Ceramic changes ?i usedf

jrbarnes@lexmark.com
Tue, 25 May 1999 09:40:39 -0400

>Recently I experienced a SMT chip cap (0.047uf - 1206package) change from
>a nominal capacitance that was within spec to a much larger capacitance
>once 3 or more seconds of soldering iron heat was applied to the component.
>Once it cooled down, I measured it again and to my dismay it measured
>0.062uf
>and 1 day later it still measured 0.062uf... This is telling me that heat
>changed
>the value of the capacitance. My question to the group is this a bad
>component
>or is this typical - I tried other similar caps and some held to their
>spec'd capacitance.
>I did a statistical sample and not all 100 caps did this, although 92 out of
>the 100
>went out of spec. (grm42-6z5u473m050 /// this was the part number that
>gave
>me the trouble).
>
>any ideas?

Keith,
If you look very carefully at the datasheets for passive components, you will
find that the specified tolerances are basically good until the parts leave the
manufacturer's shipping dock... The materials used in capacitors, resistors,
and inductors will shift in value with:
* Time (for example, aging effects of ceramic capacitors).
* Temperature (ambient temperature, internal heating in use, heating and
cooling during manufacturing processes).
* Shock and vibration, such as from shipping.
* Voltage.
* Tension/compression/torsion from solder joints or bent leads.
* Etc., etc., etc.

Two rules-of-thumb for short-term tolerances, for passive components that are
freshly assembled into a product, are:
* Electrolytic capacitors can measure up to 20% outside their design tolerance.
* Non-electrolytic capacitors, inductors, and resistors can measure up to twice
their design tolerances.

Two rules-of-thumb for end-of-life (EOL) tolerances, for passive components that
have reached the end of their useful life without breaking, are:
* Electrolytic capacitors can measure up to 40% outside their design tolerance.
* Non-electrolytic capacitors, inductors, and resistors can measure up to three
times their design tolerances.

I have many more rules-of-thumb for EOL tolerances of various types of
components in Appendix A: Taylor Worst-Case Design of my book, Electronic System
Design: Interference and Noise Control Techniques, Prentice-Hall, 1987, ISBN
0-13-252123-7 (now out of print). Taylor Worst-Case Design is a simple method
for calculating the range of outputs that you can expect from a circuit built
from discrete components, over the entire production volume and the whole
product lifetime. It was originally described in:

Taylor, Norman H., "Designing for Reliability," Proceedings of the IRE, 45:6
(June 1957), 811-822.

I first encountered Taylor Worst-Case Design in 1977, when I joined IBM to work
on testers for the inkjet printer used in the IBM OS/6. For the
thirteen-and-a-half years that I was in Test Engineering I used Taylor
Worst-Case Design almost daily, designing in-circuit and functional testers that
tested millions of printed circuit boards (PCB's) over the years. I have been
in Product Development for almost nine years now, and still use Taylor
Worst-Case Design to help make sure that we deliver solid, robust designs to
manufacturing. The method is very simple and fast, requiring just:
* The circuit schematic.
* Component specifications:
- Nominal values.
- Design tolerances.
- EOL tolerances for the most sensitive component in the circuit (the one
that has the greatest effect on the output range).
* A scientific calculator (I like the Texas Instruments TI-36X Solar, because I
can hold it in my left hand and hit the keys with my left thumb
while tracing through the schematic with my right index finger).

John Barnes Advisory
Engineer
Lexmark International

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