Re: [SI-LIST] : What speed scope should I consider?

Chris Simon (Chris.H.Simon@gd-is.com)
Thu, 20 May 1999 12:59:46 -0700

Chris

As with most other things in the world of SI, forget about the clock
frequency
and look at the fastest possible risetime of the logic families in use.
If
there are ASICs, what is the fastest edge rate for light loading, best
case
process, and cold temperature?

The combination of the scope frequency response _and_ probe frequency
response
(along with the method used for connecting the probe to ground) will
determine
whether the trace on the screen represents what's really going on. If
you use
an appropriate probe then my opinion is that a 1.5 GHz scope is adequate
for
edge rates down to about 600 pS.

Also note that the loading of the probe on the cirucit isn't just the DC
impedance of the probe. A 10 MOhm, 10 pF probe represents an input
impedance of
26.5 Ohms at 600 MHz. (unless I've done the math wrong)

Chris Simon

<>-<>--<>----<>------<>--------<>--------<>--------<>------<>----<>--<>-<>
Chris Simon chris.h.simon@gd-is.com
General Dynamics Information Systems

To an optimist, it's half full.
To a pessimist, it's half empty.
To an engineer, it's twice as large as necessary.
<>-<>--<>----<>------<>--------<>--------<>--------<>------<>----<>--<>-<>

From: "Chris Bobek" <cbobek@cadence.com> on 05/20/99 06:32 PM GMT

Please respond to si-list@silab.eng.sun.com

To: si-list@silab.eng.sun.com
cc: (bcc: Chris H Simon/GDIS/GDYN)
Subject: [SI-LIST] : What speed scope should I consider?

We are designing an SBC with a processor speed of 266MHz and bus speed
of
66MHz. There are different logic families used on the board, some CMOS,
some TTL -- just standard stuff (no ECL or GTL, etc.).

Based upon that general scenerio, what bandwidth scope should be
adequate
for doing SI analysis on our board? We are currently looking at a scope
with a 1.5GHz bandwidth (8GHz sampling rate). This seems sufficient,
but I
would like other opinions...

Thanks,

Chris

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