RE: [SI-LIST] : Ground gap problem

Ingraham, Andrew ([email protected])
Tue, 4 May 1999 06:34:17 -0700

>1. connect a cap directly to the planes (using via's) in the vicinity of
the IC
>(without connecting to the IC).
>
>2. connect a cap to the IC power and ground pins (using traces) without
>connecting the cap to the planes.
>
>3. connect a cap to the IC power and ground pins (using traces) AND connect
the
>cap to the planes (using via's).

Choice #2 doesn't make any sense to me. The inductance of the traces to the
caps significantly reduces their effectiveness as HF bypass capacitors.
Better to make the "traces" as wide as possible (minimize inductance) by
using the planes themselves as your "traces" ... i.e., connect the caps
directly to the planes.

Choice #3 makes some sense in SOME cases. The traces between the planes and
the IC are little inductors, so you get little LC lowpass filters. If that
was what you really wanted, say, to filter out noise you know would be
there, then use it; maybe you can save a discrete inductor. But the caps
should be very close to the IC pins because you've got no power plane
capacitance anymore (which usually provides the best bypassing at your
highest frequencies); and think about where the capacitor's ground pin
should go. And if you do this to the IC ground pins as well as the power
pins, your circuit had better be rather immune to HF ground noise. Most
digital logic requires a clean common ground and this would not be
recommended. Certain mixed/analog applications might benefit.

Choice #1 is usually the best. The planes are your "first line of defense,"
the best HF capacitors. Discrete capacitors take over at lower frequencies
where the intrinsic board capacitance starts running out of steam.

Regards,
Andy Ingraham

**** To unsubscribe from si-list: send e-mail to [email protected]. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****