RE: [SI-LIST] : Broadside Coupled Traces

Dr. Edward P. Sayre ([email protected])
Thu, 22 Apr 1999 19:04:26 -0400

Steve & fellow SI'ers:

I have inserted my comments between your comments regarding broadside and
edge coupled PCB differential impedance designs. See the NESA web site for
further information about high performance differential design and

At 12:25 PM 4/22/99 -0400, you wrote:
>I believe that I can address the PCB fabrication issues.
>Edge-Coupled Stripline:
>This differential impedance model consists of two traces of equal width
>centered between two planes. It represents the most controllable
>differential impedance model. The symmetry of the edge-coupled stripline in
>all three axes results in maximum predictability. Considering that it is
>shielded on both sides by planes, it is the most noise immune differential

All differential transmission systems are basically immune to common mode
effects not just or especially edge coupled systems.

>Of importance to note with edge coupled differential pairs:
>1. The distance between the traces is most easily controlled during
>fabrication as the result of having all of the critical copper features
>(trace and space) located on one side of a layer.

NESA's experience based on many TDR readings has shown that controlling the
etched space between the two differential traces is all important. If this
space is not accurately defined and etched, the differential impedance
varies widely as a result. Use of 0.5 oz copper for traces is recommended
to insure good etch results with a minimum of undercut.

>2. It is important to note that the circuits should be centered between
the two planes.

This is not necessary. You need a field solver to get the impedance
answers, but there is no theoretical reason for centering the traces.
>Broadside-Coupled Stripline:
>This model has some benefits and liabilities.

>The pair is created by having identical routing paths for the two lines
and placing them on adjacent layers.

This is true and saving routing channels, especially on logic card designs
as well as the near absence of skew between traces in a pair often makes
this a desireable design approach.

>It is mechanically similar to the dual stripline model for characteristic
>(single-ended) impedance and makes constructive use of the interplay between
>overlapping circuits.

This is true. The interaction is entirely between the two traces and the
planes are virtually unimportant except to carry the return common mode

>This model is theoretically predictable but has poor controllability in a
>fabrication environment. The dielectric thickness variation causes signals
>to have non-identical reference plane locations.

The impedance is not particularly sensitive to the distances to the
reference planes but is more sensitive to the distance between the surfaces
of the trace pair. When the dielectric is core, differential impedance is
very predicable, less so when its prepreg. Also, on a theoretical basis,
broadside coupling is a lower loss media due to the more symmetric current
distribution and the avoidance of edge loss effects.

>Of importance to note with broadside coupled differential pairs:
>1. The dielectric between the two signals becomes critical. Natural
>variation of this dielectric causes a large amount of variation in the
>differential impedance along the entire trace and in localized sections of
>the trace.

Do you have measurements of this? It does not correspond to our
measurement experience.

>2. Layer to layer shift (variation in registration) causes variation in
>the differential impedance because of a change in the overlap between the
>circuits. This shift can be up to 2 mils if the broadside pairs are on the
>same core. This shift can be up to 3 mils if the broadside pairs are on
>different cores.

This is an excellent reason to make the traces 7 - 8 mils in width. Using
these numbers, lateral shift of the traces due to misregistration has
minimum effect on differential impedance. If thinner traces are used, the
configuration look more like a two wire line which has an impedance
variation proportional to the log of the separation divided by the mean
readius of the trace. Even in this case, the variation due to registration
is not too serious.

>3. Also on the subject of overlap, the natural variation in the trace
>widths on the two different layers of the broadside pair will cause a
>reduction in the overlap, causing high variation in the resulting impedance.
This is not true. Variations in the conductor width do not cause high
variations in differewntial impedance unless the lines are exceptionally

>If you must use broadside coupled pairs
>1. Use WIDE lines (certainly greater than 10 mils) to cut down on the
>impedance variation caused by registration and etch process variation.

If one uses wide lines, it is generally to reduce losses since wide lines
increase the layer thickness which is usually to be avoided. But the point
is well taken and lines of 8 mil work just fine for 100 ohm differential

>2. Make sure that the reference planes are on layers adjacent to the
>broadside pair traces.

The broadside coupling need not be centered but the pair should be between
the two refernce planes to take care of any common mode components of
current which will flow on the traces and planes. The differential current
components flow only on the traces pairs.

>3. Make sure that the two layers of the pair are on the same core.
>This will help to reduce impedance variation caused by registration.

This is good design practice.

>4 Try to require as wide an impedance tolerance as possible.
Wide tolerance is to be avoided in high performance systems sicne wide
tolerance leads to potentially undesireable reflection effects between the
trace impedance and the termination resistor(s). Avoiding reflections is
paramount for 2.5 (Gbps) Ghz designs.

| ------------------------------------- |
| "High Performance Engineering & Design" |
| Dr. Ed Sayre e-mail: [email protected] |
| NESA, Inc. |
| 636 Great Road Tel +1.978.897-8787 |
| Stow, MA 01775 USA Fax +1.978.897-5359 |

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