"Trapezoidal" waveforms are a way of getting signals around on a board between
pieces of IP are getting recommended at times. Once inside a chip you can afford
to "square things up." Complex topologies with non-zero stub lengths are more
apt to show up the problems created by fast, hard turn-on drivers.
I guess most SI'ers know this. So, what are the drawbacks with trapezoidal,
i.e., nearly sinusoidal clocks?
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