I have a hard time believing this. With any process since
about 3 micron CMOS you have to go to quite a bit of trouble
to slow down edges this much. With processes only a little
behind the curve (say, 600 or 500 nm ) the edges are likely
to be more in the 500-600ps range.
What do the V/T tables in the IBIS model say?
> I was wondering if I would be better off with a star pattern, where each leg
> is short (less than 4"). Would this work and not require any termination?
Unless the driver has VERY well-behaved output impedance and
you balance the branches VERY well and your driver stub is
VERY short you're going to have to terminate anyway.
-- D. C. Sessions email@example.com
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