Re: [SI-LIST] : Asymmetric Striplines Configuration

Dennis Tomlinson (det@tellabs.com)
Wed, 24 Mar 1999 09:05:02 -0600

Abdullah, Mohd Muhaiyiddin wrote:
>
> All,
>
> For dual asymmetric striplines configuration, what is the best impedance
> tolerance offered by the industry today?

My experience is you can get what you're willing to pay for. By placing
a TDR coupon on the PCB panel for outgoing test, any PCB house worth it's
salt should be able to hit +-10% without a cost adder. At +-5%, a nominal
cost increase might be necessary to cover fallout and material screening.
And finally, for +-1% the vendor will ship product to your dock in an
armored truck;-) Measurement correlation could be an issue as well.

<donning flame retarding suit>
Again, in my experience, +-5% is adequate for almost any job. Even +-10%
is adequate for many.
<suit off>

>
> Also, what are the good and bad things about this configuration versus
> single striplines for high speed busses.

Good: An increase in routing density can be realized due to more routing
layers per unit height. How much is impossible to say, but some
practical bounds might be 25% on the low end to 75% top end. (Note:
these are "feel good" numbers, and are not backed by any data or
analysis whatsoever).

Bad: Very tight control of vertical and horizontal routing rules is required
because face-to-face coupling can be quite strong relative to side-to-side.

>
> Any comments very much appreciated. Have a good day.
>
> Regards,
>
> Mohd Abdullah
> Hardware Development Engineer
> Intel Technology
>

Cheers,

Dennis

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